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3 дня назад

Senior Digital IP Verification Engineer (AI/ML)

Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Germany
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Senior Digital IP Verification Engineer (AI/ML): Performing pre-silicon verification of AI/ML processing blocks, RISC-V processors, and digital IPs with an accent on UVM-based environments, metric-driven verification, and multi-level simulation. Focus on developing verification plans, debugging simulation and emulation failures, and closing functional and code coverage for high-quality IP delivery.

Location: Munich, Germany

Company

hirify.global develops semiconductor components and digital IP for automotive microprocessors, application processors, microcontrollers, networking, AI/ML, and RISC-V products.

What you will do

  • Perform pre-silicon verification of AI/ML processing blocks, RISC-V processors, and other digital IPs.
  • Define verification plans based on industry standards, product requirements, architecture, and design specifications.
  • Architect, develop, debug, and maintain UVM-based verification environments for RTL simulation.
  • Develop directed and constrained-random test cases, stimulus generation, and assertion-based verification.
  • Run simulations across RTL, power-aware RTL, gate-level, FPGA, and emulation platforms.
  • Execute regressions, analyze results, debug failures, and drive functional and code coverage closure.

Requirements

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
  • At least 5 years of experience in IP or subsystem verification.
  • Strong understanding of microprocessor architecture, interconnects, cache coherency, and memory systems.
  • Hands-on CPU verification experience with proprietary cores, RISC-V, or AI/ML accelerators.
  • Strong UVM testbench development experience, including AMBA protocols such as AHB, AXI, ACE, or CHI.
  • Advanced knowledge of Verilog, SystemVerilog, C/C++, scripting, functional and code coverage, formal verification, and pre- and post-silicon debugging.

Nice to have

  • Basic conversational German.

Culture & Benefits

  • Full-time position within the Munich Digital IP team.
  • Close collaboration with hardware, firmware, software, architecture, and system engineering teams.
  • Work across multiple digital IP and subsystem domains, including interface components, DSP subsystems, AI/ML cores, and RISC-V IPs.

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