Design Verification Engineer (SystemVerilog)

Location: Santa Clara, California, United States; hybrid work model with time split between the assigned hirify.global site and off-site work

Annual salary: $141,910–$200,340 USD

Company

hirify.global's Central Engineering Group builds scalable engineering solutions across product enablement, custom ASIC, and foundry enablement.

What you will do

• Develop and execute verification plans and testbenches for interconnect and chassis IP features at IP and subsystem levels.
• Build reusable verification components, checkers, constrained-random tests, and debug infrastructure.
• Collaborate with architecture, design, and software teams on specifications, feature clarification, bug triage, and issue closure.
• Analyze simulation failures, identify root causes, and drive technical fixes to completion.
• Plan functional coverage, close coverage gaps, and support quality signoff under technical lead guidance.
• Contribute to simulation, formal verification, regression automation, and development efficiency improvements.

Requirements

• BS or MS degree in Electrical Engineering, Computer Science, or a related field, plus 3+ years of relevant design verification experience.
• Hands-on coding experience with SystemVerilog, C/C++, and Python, including clean, reusable verification code and automation scripts.
• Knowledge of simulation-based verification methodologies such as UVM and ABV, with exposure to formal verification, testbench development, debugging, and coverage-driven verification.
• Daily hands-on experience with AI-assisted development tools for coding, debugging, and test development.
• Ability to collaborate across architecture, design, and software teams and work beyond strict design verification boundaries when required.

Nice to have

• Exposure to AMBA AXI/ACE/CHI, PCIe, CXL, or UCIe interconnect and bus protocols.
• Understanding of cache coherency and memory consistency models.
• Experience with external interfaces, system integration debugging, formal verification tools, emulation, or FPGA-based verification.
• Exposure to RTL concepts, physical design, CAD tool flows, MMUs, SMMUs, IOMMUs, or interrupt controllers.

Culture & Benefits

• Hybrid work model combining on-site and off-site work.
• Competitive pay, stock bonuses, health benefits, retirement programs, and vacation.
• Work within a data-driven engineering organization focused on customer-driven, end-to-end solutions and short development cycles.
• Employment under hirify.global's experienced-hire job type.