Назад
Company hidden
10 часов назад

Sr. Principal Product Engineer (Semiconductor)

13 068 - 19 575$
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/

TL;DR

Sr. Principal Product Engineer (Semiconductor): Leading productization and new product introduction for high-speed datacenter connectivity solutions, from silicon bring-up through mass production, with an accent on yield optimization, test methodology, and cross-functional execution. Focus on coordinating multiple product ramps, resolving complex manufacturing and quality issues, and scaling production across global matrix organizations.

Location: Santa Clara, California, United States

Salary: $156,820–$234,900 per annum, plus bonus and equity plan eligibility.

Company

hirify.global develops semiconductor solutions for enterprise, cloud, AI, carrier, storage, and datacenter connectivity infrastructure.

What you will do

  • Lead NPI programs for high-speed datacenter products, including silicon bring-up, DFT validation, and test methodology development.
  • Provide technical direction and mentorship to product engineers across multiple concurrent programs.
  • Coordinate design, test, foundry, reliability, operations, and supply chain functions during product ramps.
  • Drive yield characterization, root cause analysis, and correlation across bench, wafer sort, and final test.
  • Lead cross-functional reviews, resolve product-readiness issues, and ensure timely engineering sample delivery.
  • Scale production capacity, qualify alternate sources, improve manufacturing efficiency, and advance test infrastructure and analytics.

Requirements

  • M.S. or Ph.D. in Electrical/Electronics Engineering or a related field.
  • 15+ years of semiconductor industry experience in product engineering, device physics, and end-to-end NPI.
  • Expertise in advanced technology nodes of 10nm and below, silicon bring-up, yield optimization, and test strategy.
  • Experience leading large-scale, multi-product development and ramp programs in global matrix organizations.
  • Knowledge of yield analysis, GR&R, Cp, Cpk, and statistical data analysis.
  • Proficiency with ATE concepts, including Advantest 93K or UltraFlex, test handlers, and wafer probers; excellent written and spoken English.

Culture & Benefits

  • Full-time employment with bonus and equity plan participation, including new-hire equity grants and annual refreshers.
  • Employee stock purchase plan with a two-year lookback.
  • Family support programs, mental health resources, and broader physical and financial well-being benefits.
  • Recognition and service awards for employee contributions and milestones.
  • Technology access may be subject to U.S. export control laws; export license review may apply to some applicants.

Hiring process

  • Interview responses must be provided independently without AI tools, transcription apps, automated note-taking bots, or real-time answer generators.
  • Reasonable accommodations are available during the selection process through hirify.global HR.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →