Staff Semiconductor Device Modeling Engineer

TL;DR

Staff Semiconductor Device Modeling Engineer (FinFET/GAAFET): Developing compact device models, circuit simulation methodologies, and PDK modeling solutions for advanced semiconductor technologies with an accent on device physics, statistical analysis, and RF/EM simulation. Focus on validating modeling solutions against technology roadmaps, addressing layout-dependent and self-heating effects, and automating data analysis with Python.

Location: Hybrid work model with on-site and off-site work; assigned sites in Hillsboro, Oregon, or Santa Clara, California, United States.

Salary: $149,600–$284,580 USD annually.

Company

Intel Foundry develops advanced semiconductor process technologies, design tools, and process design kits for data-centric products.

What you will do

• Partner with technology leaders and PDK teams to align device-modeling capabilities with technology roadmaps.
• Drive readiness, validation, and delivery of simulation and modeling solutions for PDK milestones.
• Develop compact transistor models for advanced FinFET and GAAFET technologies, including layout-dependent and circuit-performance effects.
• Conduct statistical modeling, circuit simulation, and data analysis using Python and related tools.
• Implement methodologies for device targeting, benchmark circuits, self-heating effects, and Open Model Interface modeling.
• Collaborate across technical teams and geographies while leading integration and optimization initiatives.

Requirements

• Bachelor’s degree in Electrical Engineering or a related field with 6+ years of semiconductor industry experience, or a Master’s degree with 4+ years, or a Ph.D. with 2+ years.
• At least 2 years of hands-on experience with compact modeling for advanced nodes such as FinFET and GAAFET.
• Proficiency with commercial simulators including HSPICE or Spectre and extraction tools such as ICCAP or MBP.
• Experience with Python scripting for data analysis and automation.
• Experience in statistical modeling, RF simulation, and EM simulation.
• Availability for the United States hybrid work model and work at an assigned site in Oregon or California.

Nice to have

• Ph.D. in Electrical Engineering or a related discipline with 3+ years of semiconductor industry experience.
• Strong background in device physics, RF modeling, RF structure design, RF de-embedding, and EM simulation.
• Experience applying machine-learning algorithms to compact model development.
• Strong understanding of process flows, circuit design, and simulation methodologies.

Culture & Benefits

• Hybrid work model combining on-site and off-site work.
• Competitive compensation with stock bonuses.
• Health, retirement, and vacation benefits.
• Cross-functional collaboration with teams supporting Intel Foundry customers worldwide.