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обновлено 11 дней назад

Staff Semiconductor Device Modeling Engineer

149 600 - 284 580$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Staff Semiconductor Device Modeling Engineer (Semiconductor Modeling/FinFET/GAAFET): Developing compact device models, simulation methodologies, and PDK modeling solutions for next-generation semiconductor technologies with an accent on statistical modeling, RF and EM simulation, and layout-dependent effects. Focus on validating simulation tools, modeling self-heating and Open Model Interface behavior, and integrating solutions across technology and PDK teams.

Location: Hybrid role based in Hillsboro, Oregon, or Santa Clara, California, United States, with time split between an assigned Intel site and off-site work.

Annual salary: $149,600–$284,580 USD, depending on work location, skills, experience, and education.

Company

Intel Foundry's Design Technology Platform organization develops process technology and design tools that enable customers to build high-performance semiconductor products.

What you will do

  • Partner with technology leaders and PDK teams to align compact modeling capabilities with technology roadmaps.
  • Develop compact device models for advanced transistor technologies, including FinFET and GAAFET, layout-dependent effects, and circuit performance impacts.
  • Drive readiness, validation, and delivery of simulation and modeling solutions for PDK milestones.
  • Conduct statistical modeling, simulation, and data analysis using Python and related tools.
  • Develop methodologies for device-targeting benchmark circuits, self-heating effects, and Open Model Interface modeling.
  • Collaborate across teams and geographies to integrate modeling solutions and lead technical initiatives.

Requirements

  • Bachelor's degree in Electrical Engineering or a related field with 6+ years of semiconductor industry experience, or a Master's degree with 4+ years, or a Ph.D. with 2+ years.
  • 2+ years of hands-on experience with compact modeling for advanced nodes such as FinFET and GAAFET.
  • Experience with commercial simulators such as HSPICE or Spectre and extraction tools such as ICCAP or MBP.
  • Proficiency in Python scripting for data analysis and automation.
  • Experience with statistical modeling, RF simulation, and EM simulation.
  • Knowledge of device physics, RF modeling, process flows, circuit design, and simulation methodologies.

Nice to have

  • Ph.D. in Electrical Engineering or a related discipline with 3+ years of semiconductor industry experience.
  • Experience in RF structure design, RF de-embedding, and EM simulation.
  • Experience applying machine learning algorithms to compact model development.
  • Experience leading technical initiatives across teams and geographies.

Culture & Benefits

  • Hybrid work model combining on-site work at an assigned Intel site with off-site work.
  • Competitive compensation with stock bonuses.
  • Health, retirement, and vacation benefits.
  • Work with cross-functional teams supporting Intel Foundry customers and advanced semiconductor technologies.

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