2 дня назад
Silicon Architect (Semiconductor)
180 200 - 212 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Silicon Architect (Semiconductor): Defining custom silicon architectures for next-generation wearable health platforms with an accent on performance, power, size, cost, and production readiness. Focus on translating cross-functional system requirements into silicon specifications, evaluating architecture trade-offs, and driving execution with semiconductor vendors.
Location: Hybrid in San Francisco, California; compensation is based on US location tiers.
Salary: $180,200–$212,000 for Region 2 (San Diego) or $198,050–$233,000 for Region 1 (San Francisco), plus equity.
Company
develops wearable health products, including the Oura Ring and connected app, which provide insights into readiness, activity, and sleep.
What you will do
- Define custom-silicon architectures and roadmaps for future wearable platforms.
- Gather requirements from product, hardware, firmware, software, algorithms, sensing, and operations teams and convert them into measurable silicon specifications.
- Partner with semiconductor vendors and technology providers to evaluate architecture options and drive execution.
- Lead technical trade-offs across compute, memory, connectivity, security, power, packaging, testing, and manufacturing.
- Define validation, characterization, bring-up, qualification, and production-readiness plans.
- Track semiconductor technologies, process capabilities, packaging approaches, and industry trends relevant to wearable health products.
Requirements
- 10+ years of experience in semiconductor definition and architecture, SoC or ASIC development, or system architecture for high-volume consumer electronics.
- Strong knowledge of semiconductor development flows, including RTL/design, verification, physical implementation, tape-out, bring-up, characterization, qualification, and production ramp.
- Deep understanding of low-power design, power modeling, power states, and system-level power trade-offs.
- Experience working with semiconductor vendors, foundries, design houses, or external technology partners.
- Familiarity with CPUs, NPUs, DSPs, memory systems, high- and low-speed interfaces, and embedded connectivity.
- Demonstrated technical leadership, ownership, communication skills, and ability to influence without direct authority.
Culture & Benefits
- Collaborative environment with passionate coworkers across product, engineering, operations, and external partners.
- Health, dental, vision, and mental health benefits.
- 20 days of paid time off, 13 paid holidays, and 8 flexible wellness days.
- Paid sick leave and parental leave.
- Oura Ring, employee discounts, competitive salary, and equity packages.
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