4 часа назад
Post Silicon Validation Engineer (AI/ML)
160 000 - 260 000$
Мэтч & Сопровод
Для мэтча с этой вакансией нужен Plus
Описание вакансии
Текст:
TL;DR
Post Silicon Validation Engineer (AI/ML): Bringing up, validating, and characterizing ASICs from first silicon through production ramp with an accent on accelerator hardware correctness, performance, and reliability. Focus on debugging across RTL, firmware, and system levels, building automated validation infrastructure, and analyzing complex electrical and system behavior.
Location: On-site in San Jose, United States; relocation support is available for candidates moving to San Jose.
Salary: $160K–$260K per year, plus significant equity.
Company
builds custom chips, racks, software, and manufacturing systems for high-throughput, low-latency AI inference.
What you will do
- Drive first-silicon bring-up, including ASIC boot, initialization, and debug.
- Debug silicon issues across RTL, firmware, and system levels in collaboration with design, verification, and board teams.
- Validate and characterize custom IP blocks, accelerator components, compute units, and specialized processing elements.
- Execute IP-level and full-chip stress testing, corner-case analysis, and performance validation.
- Develop validation infrastructure, automation, test suites, result-capture systems, analysis tools, and regression frameworks.
- Use oscilloscopes, logic and protocol analyzers, BERTs, pattern generators, and other lab equipment to characterize signals and systems.
Requirements
- 7+ years of experience in post-silicon validation, ASIC bring-up, and silicon debug, preferably with AI/ML accelerators.
- Expertise in early silicon bring-up, peripheral interfaces, board-level debug, firmware, bootloaders, and low-level silicon environments.
- Proficiency in C, Python, and scripting for validation automation.
- Hands-on experience with oscilloscopes, logic or protocol analyzers, and validation lab tools.
- Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field; a master’s degree is preferred.
- Ability to work fully in person and collaborate across RTL, DFT, ATE, firmware, and system architecture disciplines.
Nice to have
- Experience with I2C, SPI, UART, JTAG, PCIe, Ethernet, HBM, or DDR.
- Performance and thermal characterization experience.
- AI/ML model profiling, workload correlation, or system-level validation of accelerator and server platforms.
Culture & Benefits
- Fully in-person engineering and research environment in San Jose.
- Medical, dental, and vision coverage with substantial premium support.
- $500 monthly credit for waiving medical benefits.
- $2,000 monthly housing subsidy for employees living within walking distance of the office.
- Relocation support, wellness benefits, and daily office lunch and dinner.
- Unlimited compute budget subject to return-on-investment justification.
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