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15 часов назад

Physical Design Engineer II (IC)

87 400 - 165 000$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR

Physical Design Engineer II (IC) (ASIC/SoC): Execute and optimize physical design implementation for ASIC partitions with an accent on synthesis, place and route, timing convergence, and signoff. Focus on closing EM/IR, driving logical equivalence and physical verification, troubleshooting EDA flows, and developing advanced implementation methodologies for sub-7nm designs.

Location: Onsite in San Jose, California, United States, at 181 Metro Drive or 3600 Cisco Way.

Salary: $87,400–$165,000 annually.

Company

hirify.global provides technology products and engineering services, including semiconductor and electronic design solutions through eInfochips.

What you will do

  • Execute synthesis, place and route, and static timing analysis for assigned ASIC partitions.
  • Collaborate with architects, RTL designers, and DFT engineers to resolve implementation and signoff issues.
  • Close EM/IR issues and drive logical equivalence and physical verification signoff.
  • Identify physical design challenges and improve iteration and convergence.
  • Refine synthesis, PnR, EMIR, PDN, and LEC methodologies.
  • Troubleshoot implementation flows and coordinate with EDA vendors.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related technical field, or equivalent practical experience.
  • 7+ years of hands-on physical design and implementation experience.
  • Experience with synthesis, PnR, timing convergence, and physical verification.
  • Proficiency with Innovus, Tempus, Quantus, and related EDA tools.
  • Strong understanding of physical design flows and methodologies.

Nice to have

  • Experience with low-power design techniques and tight implementation schedules.
  • System-on-Chip design and implementation experience.
  • Expertise in sub-7nm technologies.
  • Strong TCL scripting skills for custom Cadence and Synopsys flows.

Culture & Benefits

  • Full-time engineering services position.
  • Compensation varies based on geographic location, experience, education, and skill level.
  • Arrow is an equal opportunity employer.

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