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2 дня назад

Principal RFIC Design Engineer (Analog/Mixed-Signal IC)

119 900 - 159 800$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR
Principal RFIC Design Engineer (Analog/Mixed-Signal IC): Designing and developing high-performance analog and mixed-signal circuit blocks for ASIC products with an accent on transistor-level architecture, CMOS technologies, layout, verification, and silicon characterization. Focus on optimizing amplifiers, PMICs, and data converters, correlating simulations with bench and test results, and assessing reliability and production yield.

Location: San Jose, California, United States; secondary location in Irvine, California. Work is performed at the San Jose Great Oaks Headquarters or Irvine Office.

Salary: $119,900–$159,800 annually.

Company

hirify.global develops storage infrastructure and manufacturing technologies for hyperscale data centers, cloud platforms, enterprise infrastructure, and AI-driven data systems.

What you will do

  • Design high-performance analog and mixed-signal circuit blocks at transistor, block, and module levels.
  • Develop circuit architecture, run simulations, optimize designs, and supervise analog layout and layout verification.
  • Prepare test plans, characterize products, and evaluate silicon- and application-level performance.
  • Correlate simulations with bench and test results while assessing reliability, yield, and production behavior.
  • Collaborate with test, design, and other cross-functional groups and document design results.

Requirements

  • Hands-on experience designing and developing analog and mixed-signal integrated circuits.
  • Experience with CMOS circuit design in amplifiers, PMICs, regulators, ADCs, DACs, or related data converters.
  • Experience with 40 nm and below CMOS technologies and successful design releases into mass production.
  • Proficiency with industry-standard EDA tools, including Cadence, Mentor/Siemens, or Ansys.
  • Experience with analog layout, floor planning, routing, EM-IR, SOA, VDR, and reliability mitigation techniques.
  • BSEE with 10+ years of experience, MSEE with 8+ years, or PhD with 4+ years, plus strong written and verbal communication skills.

Nice to have

  • Experience working with distributed design teams.
  • Knowledge of logic digital circuits and basic digital design flow.

Culture & Benefits

  • Paid vacation and sick leave.
  • Medical, dental, vision, life, accident, and disability insurance.
  • Flexible spending and health savings accounts, employee assistance, and voluntary benefit programs.
  • Tuition reimbursement, transit benefits, employee stock purchase plan, and 401(k) savings plan.
  • Potential eligibility for short-term and long-term incentive programs, including restricted stock units.

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