Application Engineer Architect (STA SignOff)

Location: HOME OR, United States. Other listed locations include Seattle, Toronto, San Jose, and Austin.

Annual salary range: $154,000–$286,000 for Washington. Additional incentive compensation, including bonus and equity, may apply.

Company

hirify.global develops electronic design automation tools and technologies for advanced semiconductor design and signoff.

What you will do

• Lead technical engagements with customers and partners to drive adoption of the hirify.global signoff portfolio.
• Guide adoption of timing signoff, closure, and AgenticAI features across advanced nodes, including 5nm and below.
• Partner with R&D and Product Engineering to influence tool enhancements based on customer requirements.
• Drive complex benchmarks, flow optimizations, and deployment of methodologies for timing signoff, STA, IR Drop, and power/timing closure.
• Represent hirify.global at industry forums, author technical papers, and deliver keynote presentations.

Requirements

• 15+ years of experience in IC design implementation and signoff, including large-scale technical programs.
• BS or MS in Electrical Engineering, Computer Engineering, or a related field.
• Deep expertise in digital design fundamentals, advanced-node STA and ECOs, EDA tool ecosystems, UPF, constraints debugging, hierarchical STA, and 3DIC design closure.
• Strong scripting skills with Tcl, Python, and Perl for design-closure flow customization.
• Proven ability to lead technical teams and influence customers and stakeholders at executive levels.
• Excellent communication, negotiation, and leadership skills.

Nice to have

• Prior experience with hirify.global Tempus, Certus, and QRC tools.
• Experience with competitive EDA solutions.

Culture & Benefits

• Paid vacation and paid holidays.
• 401(k) plan with employer match.
• Employee stock purchase plan.
• Medical, dental, and vision plan options.
• Potential bonus, equity, and other incentive compensation.