Director, Embedded Memory

Location: Hybrid office role based in Montbonnot-Saint-Martin, France

Company

hirify.global is a publicly traded semiconductor design software and IP company providing TCAD, EDA software, embedded memory IP, and engineering support for semiconductor companies worldwide.

What you will do

• Lead architecture, circuit design, layout, characterization, and physical implementation of SRAM, ROM, register file, and dual-port RAM compilers.
• Define bitcells, memory peripherals, self-timed paths, assist circuits, redundancy, repair, DFT, and BIST strategies.
• Drive performance, power, area, minimum operating voltage, leakage, yield, and reliability optimization across process, voltage, temperature, variation, and aging conditions.
• Own the memory compiler roadmap, design methodology, verification, signoff, benchmarking, and silicon validation programs.
• Lead and develop a team of memory designers across circuit design, layout, characterization, and automation.
• Serve as the senior technical contact for presales, customer architecture discussions, integration support, PPA negotiations, tapeout, and silicon correlation.

Requirements

• BS, MS, or PhD in Electrical Engineering, Computer Engineering, or a related field.
• 10+ years of embedded memory design experience with production tapeouts of SRAM and at least two additional memory types.
• Deep expertise in bitcell and peripheral circuit design, SPICE, Monte Carlo analysis, Vmin and yield modeling, reliability analysis, and multiple process nodes including FinFET or advanced sub-7nm technologies.
• Experience with memory compiler architecture, automated generation of library and physical design views, RTL/Verilog modeling, DFT, power integrity, DRC/LVS, parasitic extraction, and silicon correlation.
• Proficiency with Python, TCL or Perl scripting and Linux-based design environments, plus experience with AI tools such as Claude, OpenAI, or Gemini.
• Proven leadership of a team of at least six memory designers and demonstrated customer-facing experience in presales, PPA negotiation, and integration support.

Nice to have

• Experience leading memory compiler programs at an IP vendor, foundry, or large semiconductor company.
• Low-power memory design experience for mobile, IoT, automotive, or AI/ML accelerator applications.
• Experience with multi-port memories beyond two ports, TCAM, or multi-bank arrays.
• Presentations at ISSCC, VLSI Symposium, or similar industry venues, or contributions to memory IP standards.
• Experience working directly with foundry partners on PDKs, bitcell qualification, and reference-flow alignment.

Culture & Benefits

• Hybrid work environment in France with collaboration across global hirify.global locations.
• Opportunity to shape the technical direction of a growing embedded memory IP and EDA portfolio.
• Medical, financial, and other employee benefits.
• Potential equity, bonuses, commission, or other compensation components depending on the offered position.