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2 months ago

Technical Program Manager (Hardware Systems)

30 417 - 36 250$
Work format
hybrid
Work type
fulltime
Grade
senior
English
c1
Country
US
This vacancy is from Hirify.Global listVacancy from Hirify Global, list of international tech companies
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Job description

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TL;DR
Technical Program Manager (Hardware Systems): Owning the execution of custom hardware systems for AI fleets from concept through production deployment with an accent on NPI processes and vendor management. Focus on coordinating silicon, firmware, and datacenter teams to deliver scalable accelerator platforms.

Location: Hybrid (San Francisco, CA or New York City, NY). Must be based in or able to work from one of the offices at least 25% of the time.

Salary: $365,000 - $435,000 USD

Company

Anthropic is a public benefit corporation focused on creating reliable, interpretable, and steerable AI systems that are safe and beneficial for society.

What you will do

  • Own the integrated hardware systems program plan from requirements through EVT/DVT/PVT, qualification, and production ramp.
  • Drive execution with ODMs, contract manufacturers, and component vendors, managing SOWs, build schedules, and factory readiness.
  • Establish and run the NPI cadence, including build matrices, engineering reviews, DFx, and issue triage.
  • Coordinate bring-up and validation programs for new platforms, focusing on firmware, BMC, diagnostics, and reliability targets.
  • Manage critical interfaces between silicon, datacenter integration, infrastructure software, and supply chain teams.
  • Evaluate technology partners and reference platforms to provide build/buy/co-design recommendations.

Requirements

  • 8+ years of experience in hardware systems or NPI program management for compute, networking, storage, or accelerator platforms.
  • Direct ownership of at least one platform from concept through volume production, including experience with EVT/DVT/PVT arcs.
  • Technical fluency across the hardware stack: power delivery, thermal, mechanical, high-speed interconnect, and board design.
  • Proven experience managing ODMs/CMs, including SOW negotiation and quality escalation.
  • Strong written communication skills for creating plans, reviews, and executive updates.
  • Must be based in or able to work from the US (San Francisco or New York City) according to the hybrid policy.

Nice to have

  • Experience with AI/ML accelerator systems (GPU, TPU, custom ASIC), HPC, or hyperscale datacenter platforms.
  • Knowledge of liquid-cooled and high-density rack architectures or optical interconnect programs.
  • Experience coordinating the chip-package-system interface with silicon teams.
  • Familiarity with datacenter integration and fleet-scale reliability/RAS programs.
  • BS/MS in Electrical Engineering, Computer Engineering, Mechanical Engineering, or a related field.

Culture & Benefits

  • Collaborative research environment focused on high-impact "big science" projects.
  • Competitive compensation with optional equity donation matching.
  • Generous vacation and parental leave policies.
  • Flexible working hours and high-quality office spaces.
  • Visa sponsorship available for eligible candidates.

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