Process Integration Development Engineer (Semiconductor)

TL;DR

Process Integration Development Engineer (Semiconductor): Developing and certifying integrated reliability methodologies for advanced semiconductor process technologies with an accent on defect reliability, technology qualification, statistical quality systems, and failure analysis. Focus on designing experiments, building statistical models, reducing latent reliability risks, and enabling technology readiness for high-volume manufacturing.

Location: Hillsboro, Oregon, United States; hybrid work with regular on-site presence at the assigned hirify.global site

Salary: $155,520–$219,550 USD annually

Company

hirify.global is a semiconductor technology corporation developing advanced process technologies and manufacturing solutions through hirify.global Foundry.

What you will do

• Develop and execute integrated and defect reliability certification strategies for advanced semiconductor process technologies.
• Drive HTOL, ELFR, ELF modeling, defect reliability controls, screening methodologies, and technology qualification activities.
• Design experiments to characterize reliability behavior, validate models, and investigate device and process failure mechanisms.
• Build statistical models and risk assessments to evaluate defectivity, latent reliability risk, product quality, and technology readiness.
• Develop statistical quality systems, process capability analyses, MTS, CPK, automation, data analytics, and AI-assisted engineering workflows.
• Collaborate with process integration, design, device, manufacturing, and product teams while communicating certification status and technical risks.

Requirements

• Ph.D. required in Electrical Engineering, Materials Science, Physics, Reliability Engineering, Semiconductor Engineering, or a related technical discipline.
• At least 2 years of experience in the semiconductor industry.
• Strong analytical and problem-solving skills with knowledge of semiconductor device physics and manufacturing fundamentals.
• Experience with statistical analysis and experimental design.
• Excellent written and verbal communication skills.
• Ability to work effectively in a highly collaborative, cross-functional environment.

Nice to have

• Experience with semiconductor reliability engineering, technology qualification, advanced CMOS development, or process integration.
• Knowledge of HTOL, ELFR, TDDB, BTI, HCI, electromigration, defect reliability, or latent defect modeling.
• Experience with failure analysis, physical characterization, statistical quality systems, DOE, JMP, SAS, or R.
• Experience with Python, SQL, machine learning, data analytics, or AI-assisted engineering automation.

Culture & Benefits

• Hybrid work model combining on-site work at the assigned hirify.global site with off-site work.
• Competitive compensation with stock bonuses.
• Health, retirement, and vacation benefits.
• Cross-functional collaboration across technology development, design, manufacturing, test, and product organizations.