Senior PCB Layout Engineer (Hardware)

TL;DR

Senior PCB Layout Engineer (Hardware): Designing complex, high-speed printed circuit boards for networking and server systems with an accent on advanced constraint-driven layout and signal integrity. Focus on optimizing multi-layer PCBs, implementing high-speed interfaces like DDR5 and PCIe Gen5, and ensuring manufacturing readiness.

Location: Onsite at an HPE office (California, USA)

Salary: $105,500 – $213,500

Company

A global edge-to-cloud company advancing the way people live and work by helping companies connect, protect, and analyze their data.

What you will do

• Design complex multi-layer PCBs (12–40+ layers) using Cadence Allegro PCB Designer.
• Route critical high-speed interfaces, including DDR4/DDR5, PCIe Gen4/Gen5+, and Ethernet (10G–112G SerDes).
• Manage constraints and stackups, collaborating with vendors to validate materials and HDI capability.
• Apply SI/PI best practices to ensure return path continuity and reduce crosstalk.
• Generate fabrication and assembly outputs, including ODB++, IPC-2581, and Gerber files.
• Mentor junior and mid-level designers and lead layout planning and design reviews.

Requirements

• 8–15+ years of PCB layout experience.
• Expert proficiency in Cadence Allegro.
• Deep knowledge of high-speed design techniques, impedance control, and HDI technologies.
• Strong understanding of PCB fabrication and assembly processes.
• Must be based in or able to work onsite in the USA (California).

Nice to have

• Experience with networking, server, or telecom hardware.
• Familiarity with 25G/56G/112G SerDes and backplane design.
• Experience with SI/PI analysis tools.

Culture & Benefits

• Comprehensive health, financial, and emotional wellbeing benefits for employees and families.
• Dedicated personal and professional development programs.
• Unconditionally inclusive culture that values varied backgrounds.
• Flexibility to manage work and personal needs.