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3 часа назад

LTD Defect Metrology Engineer (Semiconductor)

133 800 - 188 890$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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Описание вакансии

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TL;DR

LTD Defect Metrology Engineer (Semiconductor): Identifying and characterizing defects in advanced silicon process technology to drive yield improvement with an accent on cutting-edge metrology tools and defect reduction roadmaps. Focus on collaborating with integration and yield teams to develop process fixes and ensuring seamless technology transfer to high-volume manufacturing.

Location: Hybrid: Must be based in Hillsboro, Oregon, US

Salary: $133,800 - $188,890 USD

Company

hirify.global is a global leader in computing technology, focusing on extending Moore's Law through advanced semiconductor manufacturing and scaling.

What you will do

  • Identify defects impacting yield and performance in advanced silicon process technology.
  • Characterize processes using state-of-the-art metrology tools and create comprehensive defect reduction roadmaps.
  • Partner with Integration, Yield, and failure analysis labs to determine root causes of defect issues.
  • Drive technology transfer to manufacturing volumes using the Copy Exactly Methodology.
  • Present defect summaries to LTD engineering teams and ensure quality through IMT and FTs.
  • Foster a team culture based on trust, collaboration, safety, and accountability.

Requirements

  • Master's degree with 4+ years of experience, or a PhD in Physics, Material Science, Chemical/Electrical/Mechanical/Nuclear Engineering, Computer Science, Optics, or Chemistry.
  • Focus on hands-on experimental research.
  • Must be based in or eligible to work in the United States.

Nice to have

  • Experience with materials characterization tools such as SEM and TEM.
  • Proficiency in statistical data analysis using MATLAB, Excel, or JMP.
  • Knowledge of semiconductor processing fundamentals (lithography, etch, polishing) and transistor device physics.
  • Demonstrated experience with Statistical Process Control (SPC) or Design of Experiments (DOE) principles.
  • Experience with Brightfield, Darkfield, or Voltage Contrast (VC) metrology.

Culture & Benefits

  • Competitive total compensation package including stock bonuses.
  • Comprehensive benefit programs covering health, retirement, and vacation.
  • Hybrid work model allowing for a split between on-site and off-site work.
  • Commitment to ethical hiring practices and a culture of excellence.

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