ASIC Verification Engineer

Location: Irvine, California, United States

Annual base salary: USD 101,000–162,000, plus discretionary bonus and equity awards.

Company

hirify.global develops semiconductor solutions for wired and wireless communications, including high-speed physical layer transceivers for AI data centers, enterprise networks, and server virtualization.

What you will do

• Develop a thorough understanding of IEEE Ethernet protocols, chip architecture, microarchitecture, and design specifications.
• Build advanced verification environments and testbench components using SystemVerilog and UVM.
• Participate in block-level and chip-level ASIC verification.
• Develop scripts and tools that improve engineering efficiency and product quality.
• Collaborate with marketing, architecture, firmware, physical design, and layout teams throughout the product development cycle.

Requirements

• Bachelor’s degree in Engineering with 5+ years of related experience, or a recent graduate with a Master’s or PhD in Engineering.
• Design or verification experience, or equivalent experience.
• Background in logic design, electronic circuit design, and ASIC design and verification.
• Proficiency in at least one HDL, including Verilog, SystemVerilog, or VHDL.
• Strong communication, teamwork, self-motivation, flexibility, and willingness to learn.

Nice to have

• Proficiency in C or C++ and hands-on object-oriented programming experience.
• Scripting experience with Python, Perl, or Tcl.

Culture & Benefits

• Medical, dental, and vision plans.
• 401(k) participation with company matching and an Employee Stock Purchase Program.
• Paid holidays, sick leave, vacation time, and applicable family leave.
• Employee Assistance Program, annual bonus eligibility, and equity awards.