Senior ASIC Design Verification Engineer (Space)

Location: Remote (Must be a U.S. Person as defined by ITAR)

Salary: $170,000 – $250,000

Company

hirify.global is a Series C space startup building the largest and highest-power satellite platforms for missions ranging from LEO to deep space.

What you will do

• Develop and execute verification plans for block-level, subsystem-level, and full-chip environments.
• Build SystemVerilog/UVM test benches including agents, monitors, scoreboards, and coverage models.
• Drive constrained-random and directed testing strategies to validate functionality and stress scenarios.
• Implement and maintain functional, code, and assertion coverage to ensure sign-off.
• Manage regression testing, simulation farms, and CI pipelines for fast debug iterations.
• Collaborate with architecture, RTL, DFT, and physical design teams to ensure end-to-end test coverage.

Requirements

• Must be a U.S. Person (citizen, permanent resident, or protected individual) due to ITAR compliance.
• B.S. or M.S. in Electrical Engineering, Computer Engineering, or related field.
• 5+ years of experience in ASIC/SoC verification.
• Solid understanding of SystemVerilog, digital logic, RTL design, and hardware verification flows.
• Proficiency with simulation tools (VCS, Xcelium, Questa), waveform debug, and scripting (Python, Perl, TCL).
• Experience with UVM-based testbench development, regression management, and CI/CD automation.

Nice to have

• Experience with reference models and low power verification.
• Familiarity with gate-level simulation and analog behavioral models.
• Experience in space, telecom, or RF/digital mixed systems.
• Involvement in post-silicon validation planning.

Culture & Benefits

• Equity in the company.
• Comprehensive benefits package including medical, dental, and vision coverage.
• Paid time off and paid parental leave.
• Life insurance and other perks.
• Opportunity to work on groundbreaking space technology in a fast-paced startup environment.