Senior ASIC Design Verification Engineer

Location: United States - Remote. The role requires access to ITAR-controlled information and items; the hired candidate must be a U.S. person or otherwise eligible for a federally issued export-control license.

Salary: $170,000–$250,000 per year, plus equity.

Company

Develops high-power satellite platforms for commercial and U.S. government missions, from low Earth orbit to deep space.

What you will do

• Develop and execute block-level, subsystem-level, and full-chip verification plans.
• Build SystemVerilog/UVM testbenches with agents, monitors, scoreboards, checkers, and coverage models.
• Develop assertions, constrained-random and directed tests, simulations, regressions, and coverage analysis.
• Triage failures, perform root-cause analysis, and collaborate with architecture, RTL, DFT, firmware, physical design, and silicon validation engineers.
• Manage simulation farms and CI pipelines while driving coverage closure for sign-off.
• Support silicon bring-up, post-silicon validation, design reviews, and improvements to verification methodologies.

Requirements

• 5+ years of experience in ASIC or SoC verification.
• B.S. or M.S. in Electrical Engineering, Computer Engineering, or a related field.
• Strong knowledge of SystemVerilog, digital logic, RTL design, UVM, constrained-random testing, functional coverage, and SystemVerilog Assertions.
• Experience with simulation, waveform debug, coverage tools, scripting languages such as Python, Perl, or TCL, and revision control with Git.
• Experience with regression management, CI/CD automation, and industry-standard interfaces such as APB, AHB, or AXI.
• Familiarity with embedded processor-based designs and firmware or bare-metal coding in C or C++.

Nice to have

• Reference-model development and integration experience.
• Knowledge of low-power verification, gate-level simulation, or analog behavioral models.
• Experience with post-silicon validation planning and execution.
• Experience in space, telecom, or RF/digital mixed systems.
• Experience working in cross-functional, geographically distributed teams.

Culture & Benefits

• Hands-on role with high ownership and deep technical engagement in first-generation silicon.
• Paid time off, medical, dental, and vision coverage.
• Life insurance and paid parental leave.
• Equity in the company and additional employee benefits.