Staff Design Verification Engineer (RISC-V CPU Core Verification)

Location: Austin, Texas, United States. The role requires satisfactory proof of the right to work in the United States of America and authorization to access export-controlled technology, or the ability to obtain the necessary export license or approvals.

Company

hirify.global develops high-performance RISC-V compute platforms and CPU technologies for applications including artificial intelligence, automotive, data centers, mobile, and consumer systems.

What you will do

• Own verification planning and execution for ALU and execution-focused CPU core functionality from block level through integration and signoff.
• Define test plans, stimulus, coverage strategies, checkers, scoreboards, assertions, and verification environments for complex execution-pipeline behavior.
• Verify arithmetic and logical execution, compare and branch-condition generation, dependency handling, bypass and forwarding, replay, flush, recovery, exceptions, and issue/dispatch interactions.
• Analyze corner cases involving scoreboarding, operand readiness, structural conflicts, speculative execution, branch, load/store, and commit behavior.
• Drive failure analysis, root-cause debugging, coverage closure, and improvements to reusable verification infrastructure and methodology.
• Collaborate with architecture, RTL, performance, compiler, system verification, and software teams while mentoring other engineers.

Requirements

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 7+ years of relevant ASIC, CPU/core, or SoC design verification experience, with ownership of complex verification problems.
• Strong hands-on experience with SystemVerilog-based verification and modern verification methodologies.
• Direct CPU/core verification experience and a strong understanding of computer architecture and CPU microarchitecture.
• Experience with CPU execution areas such as ALU pipelines, issue and dispatch, dependency handling, forwarding, replay, or integer execution.
• Familiarity with Python, C, C++, or similar programming languages for verification infrastructure and automation.

Nice to have

• Experience verifying high-performance out-of-order CPU cores and execution pipelines across issue, operand collection, execute, writeback, and commit.
• Experience with formal verification, emulation, or acceleration.
• Experience developing assertions, checkers, and scoreboards for control-heavy and timing-sensitive CPU behavior.
• Experience with reusable infrastructure, automation, and technical leadership beyond immediate ownership.

Culture & Benefits

• Collaboration across architecture, design, performance, verification, compiler, system verification, and software teams.
• Opportunity to contribute to high-performance out-of-order CPU cores, including integer, floating-point, vector, frontend, mid-core, and load-store components.
• Base pay may be supplemented by variable or incentive compensation and equity.
• Benefits may include healthcare, retirement plans, paid time off, and other comprehensive benefits.
• Employment is subject to background and reference checks, employment eligibility verification, and export-control requirements.