Design Verification Engineer (Semiconductor)

TL;DR

Design Verification Engineer (Semiconductor): Developing and executing comprehensive verification cycles for complex semiconductor products with an accent on UVM, System Verilog, and C++ testbench environments. Focus on building test plans, performing stress and corner testing, and ensuring coverage closure for high-performance hardware designs.

Location: Must be based in the US (Austin, TX or San Jose, CA preferred; remote considered).

Company

eInfochips, an Arrow company, is a global leader in product engineering and semiconductor design services with over two decades of experience in edge-to-cloud innovation.

What you will do

• Develop and integrate BFM, Driver, Monitor, and Scoreboard components into test benches.
• Execute complete verification cycles including stress testing, failure debug, and gate-level simulations.
• Implement assertions and achieve coverage closure for complex hardware designs.
• Collaborate with the team to ensure verification closure and high-quality deliverables.
• Report progress effectively to customers on a daily or weekly basis.

Requirements

• 6+ years of experience in System Verilog HVL and C++/C.
• 6+ years of experience in UVM.
• Proficiency in debug and assertions coding.
• Experience with scripting languages such as Make, Perl, or Python.
• Must be authorized to work in the US and able to travel to client office locations as requested.

Culture & Benefits

• Competitive financial compensation and various compensation plans.
• Comprehensive benefits including Medical, Dental, and Vision insurance.
• 401k plan with matching contributions.
• Health Savings Account (HSA) and Health Reimbursement Account (HRA) options.
• Paid Time Off and tuition reimbursement programs.