Design Verification Engineer (AI)

Location: On-site in Santa Clara, California, United States

Annual salary: $105,650–$149,150 USD

Company

hirify.global develops semiconductor technologies and platform products, including next-generation SoC, interconnect, and chassis IP.

What you will do

• Develop testbench components, constrained-random stimulus, and functional checkers for interconnect and chassis IP.
• Write, run, and debug simulation tests, analyze failures, and drive root-cause issues to closure.
• Contribute to functional coverage plans, coverage closure analysis, and regression triage.
• Participate in specification reviews, design discussions, and bug triage across architecture, design, and software boundaries.
• Use AI-assisted coding and debugging tools and contribute automation and scripting to improve development productivity.
• Build expertise in hardware design, verification methodology, and chip development flows.

Requirements

• BS or MS in Electrical Engineering, Computer Engineering, or Computer Science, plus at least 3 months of hardware design or verification internship experience.
• Foundation in logic design and digital circuits, with the ability to read and reason about RTL.
• Algorithmic thinking and software fundamentals, with proficiency in at least one of C/C++, Python, or SystemVerilog.
• Coursework or project exposure to at least two areas including computer architecture, parallel and distributed computing, operating systems, hardware/software interfaces, or VLSI design.
• Regular use of AI coding assistants as a productivity tool in coursework or project work.
• This position is not eligible for hirify.global immigration sponsorship.

Nice to have

• Experience or coursework in hardware verification, FPGA design, or RTL simulation with ModelSim, VCS, Questa, or similar tools.
• Exposure to SystemVerilog, UVM concepts, or assertion-based verification.
• Familiarity with AXI, AHB, or PCIe protocols and cache or memory hierarchy concepts.
• Project experience involving hardware modeling, HDL algorithm implementation, or hardware-software co-design.
• Comfort with Linux, Git, and build or test automation scripts.

Culture & Benefits

• Collaboration with senior engineers and structured development of end-to-end verification skills.
• Health, retirement, and vacation benefits.
• Competitive pay and stock bonuses.
• On-site work model with Shift 1 scheduling.