Вакансия из Hirify Global, списка международных tech-компаний Для мэтча и отклика нужен Plus
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Зарплата и рынок
Выше рынка
$154к-286к/год
$180к$200кмедиана$220к
По похожим ролям (50) ~ $200к/год
На СНГ рынке: $1.9к/мес ($1.8к - $2.5к)
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Крутая вакансия
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Влиятельная роль в лидере индустрии с понятным кругом задач и оплатой выше рыночной.
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Высокая зарплатаСовременный стекСильный доменПрозрачные задачи
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Описание вакансии
Текст:
Hirify AI/Оригинал
TL;DR
Senior Principal Design Engineer-Palladium & Protium Customer Enablement & Solutions (Hardware Emulation/FPGA Prototyping): Developing and deploying customer solutions for Cadence Palladium and Protium platforms with an accent on high-speed protocols, memory interfaces, and system-level verification. Focus on debugging hardware/software boundary issues, building acceleration firmware and FPGA solutions, benchmarking platforms, and solving complex architectural challenges for semiconductor and systems customers.
Location: San Jose, California, United States
Annual salary: $154,000–$286,000, plus potential bonus, equity, and benefits.
Company
hirify.global develops technology for system-level chip design verification, including hardware emulation and FPGA prototyping platforms.
What you will do
Collaborate with engineering teams and customers to develop, deploy, productize, and optimize protocol solutions on Palladium and Protium platforms.
Define and develop customer-specific emulation and prototyping requirements for high-speed interfaces and memory protocols such as PCIe and CXL.
Develop acceleration firmware and FPGA system solutions, establish verification methodologies, and support hirify.global emulation tools.
Triage and resolve systemic issues across hardware and software, including driver behavior, protocol compliance, and system stability.
Lead technical evaluations and create high-performance benchmarks demonstrating hirify.global hardware platforms.
Prepare and deliver technical presentations, white papers, and product demonstrations for current and prospective customers.
Requirements
BS degree with at least 10 years of experience or MS degree with at least 7 years of experience.
Strong fundamentals in digital design, computer architecture, and system-level verification.
Deep technical knowledge in several areas including simulation with advanced testbenches, emulation with TBA and ICE, and FPGA prototyping.
Experience with SystemVerilog or Verilog and/or C or C++.
Understanding of standard interconnect or I/O protocols used in modern chip designs, including high-speed interfaces and memory protocols.
Strong debugging skills using waveforms, logs, and protocol analyzers.
Ability to work across hardware and software boundaries.
Excellent communication and interpersonal skills, with the ability to work in an international environment.
Culture & Benefits
Customer-facing work with semiconductor and systems companies in an international environment.
Paid vacation and paid holidays.
401(k) plan with employer match.
Employee stock purchase plan.
Medical, dental, and vision plan options.
Potential incentive compensation including bonus, equity, and benefits.
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