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23 часа назад

Principal Engineer, Test Engineering (Mixed-Signal)

137 000 - 196 000$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Principal Engineer, Test Engineering (Mixed-Signal): Architecting comprehensive test solutions for complex mixed-signal semiconductor products from early silicon validation through high-volume production with an accent on DFT, ATE platforms, signal integrity, and test methodology innovation. Focus on developing reusable test IP, leading NPI readiness, implementing AI/ML for yield enhancement, and transferring solutions to high-volume OSATs.

Location: San Diego, California, USA; hybrid with four days in the office and Fridays remote

Salary: $137,000–$196,000 per year

Company

hirify.global develops semiconductor products and sensing solutions for wearables, mobile phones, industrial applications, automotive, and high-speed communications.

What you will do

  • Architect test strategies for complex mixed-signal products from concept through production maturity.
  • Lead new product introduction test development, readiness reviews, characterization strategies, and correlation methodologies.
  • Drive DFT and testability requirements into IC architecture and establish reusable test IP, libraries, and frameworks.
  • Research and implement next-generation ATE platforms, instrumentation, measurement techniques, and proprietary test methods.
  • Transfer test solutions to high-volume OSATs, targeting more than 99% first-pass success and ongoing test cost improvements.
  • Mentor engineers, create methodology documentation, and build strategic relationships with test partners.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
  • 12+ years of semiconductor test engineering experience, including 8+ years in mixed-signal test development.
  • Experience leading NPI programs for high-speed communication ICs.
  • Expertise with the Advantest V93000 platform and SmarTest 7/8, plus advanced C/C++, Python, and TCL programming.
  • Strong knowledge of high-speed signal integrity, jitter analysis, BER testing, analog/mixed-signal DFT, BIST, scan, boundary scan, statistical process control, and quality methodologies.
  • Experience with PCB design tools such as Cadence or Altium and signal integrity simulation.

Nice to have

  • Master’s degree or PhD and 15+ years of semiconductor test experience.
  • Experience with SiGe BiCMOS, AEC-Q100, wafer-level testing, or probe card design.
  • Knowledge of 93000 PS1600/PS3600 digital channels and Wave Scale RF.
  • Experience with test data analytics and machine learning applications.

Culture & Benefits

  • Work within a global test engineering organization serving multiple semiconductor business units.
  • Collaborate with IC design, Product Engineering, customer quality teams, OSATs, and strategic vendors.
  • Lead company-wide test architecture standards and continuous improvement initiatives.
  • Participate in an environment focused on innovation, technical leadership, and knowledge sharing.

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