Principal Engineer, Test Engineering (Mixed-Signal)

Location: San Diego, CA, USA — hybrid, with 4 days in the office and Friday remote.

Salary: $137K–$196K base pay annually.

Company

hirify.global develops semiconductor products supported by global test engineering capabilities across mixed-signal, high-speed digital, and RF technologies.

What you will do

• Architect test strategies and advanced methodologies for complex mixed-signal products from concept through production maturity.
• Drive DFT and testability requirements into IC architecture and establish reusable test IP, libraries, frameworks, standards, and best practices.
• Lead NPI architecture reviews, test readiness reviews, characterization strategies, correlation methodologies, and customer quality interactions.
• Research and implement next-generation ATE platforms, instrumentation, measurement techniques, and proprietary test methods.
• Transfer test solutions to high-volume OSATs, target over 99% first-pass success, reduce NPI cycle time by 10–20%, and drive test cost improvements.
• Mentor junior engineers, develop methodology documentation and training, and build strategic relationships with test partners.

Requirements

• Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related field.
• 12+ years of progressive semiconductor test engineering experience, including 8+ years specifically in mixed-signal test development.
• Proven experience leading NPI programs for high-speed communication ICs.
• Expert-level proficiency with the Advantest V93000 platform and SmarTest 7/8.
• Advanced programming skills in C/C++, Python, and TCL.
• Deep understanding of high-speed signal integrity, jitter analysis, and BER testing.
• Expertise in analog/mixed-signal DFT techniques, including BIST, scan, and boundary scan.
• Strong foundation in statistical process control and quality methodologies.
• Experience with Cadence or Altium PCB design tools and signal integrity simulation.
• Ability to influence across organizations without direct authority, deliver complex projects on aggressive schedules, present to executives and customers, and build strategic vendor relationships.

Nice to have

• Master’s degree or PhD in a relevant engineering discipline.
• 15+ years of semiconductor test experience.
• Experience with SiGe BiCMOS process technology and related test challenges.
• Knowledge of automotive quality standards, including AEC-Q100, and qualification flows.
• Familiarity with 93000 PS1600/PS3600 digital channels and Wave Scale RF.
• Experience with wafer-level testing, probe card design, test data analytics, and machine learning applications.

Culture & Benefits

• Work with a global test engineering organization serving multiple semiconductor business units and sites.
• Contribute to a culture of innovation, continuous improvement, and continuous learning.
• Hybrid schedule with four office days and remote work on Friday.
• EEO employer and drug-free workplace.