CPU Verification Engineer (SystemVerilog/UVM)

Location: On-site in Austin, Texas, or Hillsboro, Oregon, United States

Annual salary range: $105,650–$200,340 USD

Company

hirify.global develops semiconductor and computing technologies designed to advance digital experiences and infrastructure.

What you will do

• Develop and execute verification plans for CPU logic against architectural specifications.
• Build scalable UVM-based testbenches and functional coverage models.
• Run system-level simulations to identify bugs and ensure functional integrity.
• Debug pre-silicon issues, determine root causes, and resolve test failures.
• Collaborate with CPU architects and RTL designers on architectural and microarchitectural features.
• Document verification strategies, lead technical reviews, and improve verification infrastructure.

Requirements

• Bachelor’s degree in electrical/electronics engineering, computer engineering, or a related STEM field with at least 1 year of relevant experience, or a master’s degree in a related field.
• At least 1 year of experience developing SystemVerilog in UVM-based testbenches.
• At least 1 year of experience with Python or Perl scripting and C++.
• Understanding of digital logic design, including instruction set execution, ALUs, control units, registers, memory, and system buses.
• Strong analytical and debugging skills with experience validating architectural and design changes.

Nice to have

• PhD in electrical/electronics engineering, computer engineering, or a related STEM field with 2+ years of industry experience.
• x86 knowledge, strong assembly skills, Git, Synopsys simulators, and Agile methodologies.
• Experience using AI agents in verification.

Culture & Benefits

• On-site work model with Shift 1 scheduling in the United States.
• Competitive pay, stock bonuses, health benefits, retirement benefits, and vacation.
• Ethical hiring practices with no recruitment, medical examination, or employment-related fees.