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1 день назад

Senior Principal ASIC FPGA Engineer (ASIC)

191 146 - 212 053$
Формат работы
hybrid
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR

Senior Principal ASIC FPGA Engineer (ASIC): Defining and leading the technical approach for ASIC/FPGA development from concept to silicon with an accent on RTL design, timing closure, and microarchitecture. Focus on managing the full ASIC design lifecycle, implementing advanced FinFET process nodes, and driving rigorous verification and tape-out processes.

Location: Must be a U.S. citizen and must hold a Department of Defense Secret security clearance at the time of hire.

Salary: $191,146 - $212,053 / Yr

Company

hirify.global is a global defense and scientific solutions provider with a team of over 12,000 professionals.

What you will do

  • Own the ASIC/FPGA technical approach from concept through silicon, including system partitioning and interface definition.
  • Lead detailed RTL development focusing on bus fabric integrity, clock domain crossings, and reset sequencing.
  • Manage timing closure in advanced process nodes through synthesis and static timing analysis.
  • Develop and own test and simulation plans, serving as the primary point of contact for verification and failure closure.
  • Mentor junior and mid-level engineers and lead RTL code reviews to maintain high technical standards.
  • Contribute to program planning, including Integrated Master Schedule (IMS) development and Earned Value (EV) reporting.

Requirements

  • U.S. citizenship and an active DoD Secret security clearance are mandatory.
  • Bachelor's degree in Electrical/Computer Engineering with 10+ years experience, or Master's with 8+ years.
  • Proven experience with full ASIC tape-outs, timing closure, and post-silicon bring-up.
  • Deep familiarity with FinFET process nodes (e.g., 7nm, 5nm) and commercial foundry flows (TSMC, Samsung, or equivalent).
  • Expertise in RTL design, CDC analysis, and power optimization.
  • Proficiency in JIRA for issue tracking and backlog management.

Culture & Benefits

  • Flexible work environment supporting hybrid arrangements.
  • Highly competitive benefits package.
  • Collaborative, high-performance team culture within the defense and scientific arenas.
  • Recognition and reward system for individual contributions.

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