STA Engineer (ASIC)

Location: Fort Collins, Colorado, USA — onsite at 4380 Ziegler Road

Annual base salary: $129,400–$207,000, plus discretionary annual bonus and equity awards.

Company

hirify.global's ASIC Products Division designs and manufactures next-generation, high-performance, power-efficient ASICs.

What you will do

• Own timing closure activities, including timing analysis and collaboration on timing changes.
• Work with physical design and logic design teams to debug constraints and improve timing.
• Create timing ECOs for project tapeout and support implementation activities.
• Build and maintain scripts, methodologies, and timing infrastructure for analysis and runs.
• Perform deep analysis of timing paths and identify critical issues.
• Document guidelines and specifications and follow issues through to completion.

Requirements

• 5–10 years of hands-on STA experience and 10+ years of relevant industry experience.
• MSEE or equivalent degree.
• Experience with timing for large, high-performance SoC designs in sub-micron technologies.
• Strong understanding of timing margins, synthesis-to-signoff flows, noise, crosstalk, OCV, circuit modeling, SPICE models, and worst-case corner selection.
• Strong programming skills in Perl and TCL, with proficiency in industry-standard timing tools.
• Experience with complex designs and timing closure; multi-scenario timing closure, ECO techniques, and implementation experience are beneficial.

Culture & Benefits

• Medical, dental, and vision plans.
• 401(k) participation with company matching and an Employee Stock Purchase Program.
• Employee Assistance Program, paid holidays, paid sick leave, and vacation time.
• Paid family leave and other leave benefits in accordance with applicable laws.
• Discretionary annual bonus, competitive new-hire equity grant, and potential annual equity awards.