Principal IC Design Engineer

TL;DR

Principal IC Design Engineer (DRAM/SOC): Design and support DRAM interface logic implementation for state-of-the-art SOCs with an accent on high-performance interfaces, system integration, and timing budgets. Focus on leading design analysis, verification, synthesis, and optimization with layout engineers.

Location: Broomfield, CO or Mendota Heights, MN (USA) Must have legal authorization to work in the US

Salary: $127,100 - $203,400 (annual base)

Company

Global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

What you will do

• Design and implement DRAM interface logic
• Perform detailed design analysis using advanced tools
• Lead team in simulation, synthesis, formal verification, constraints, and validation
• Collaborate with internal/external teams and layout engineers for optimization
• Define DRAM system timing budgets aligned to product requirements
• Generate design specifications and collateral for IP release

Requirements

• Strong experience with high-performance DRAM interface design
• Knowledge of SOC architecture and memory interface integration
• Expertise in HDL: Verilog, VHDL, SystemVerilog
• Understanding of physical implementation, timing closure, process variation
• Signal Integrity analysis and impacts
• Must have legal authorization to work in the US
• Bachelor's in EE/CE/CS +12 years or Master's +10 years experience

Culture & Benefits

• Competitive base salary, discretionary bonus, equity grants
• Medical, dental, vision plans
• 401(k) with company matching, ESPP
• Paid holidays, sick leave, vacation, family leave
• Employee Assistance Program (EAP)