Physical Design CPU Methodology Engineer (AI/ML)

Location: Remote, based in the United States. The role may involve access to U.S. export-controlled technology and requires eligibility under applicable export laws.

Compensation: $100,000–$500,000 annually, including base and variable compensation targets.

Company

Tenstorrent develops high-performance AI platforms built on software, compilers, networking, and RISC-V semiconductor technologies.

What you will do

• Define and own CPU physical design methodology across synthesis, floorplanning, power planning, place and route, clock-tree synthesis, extraction, static timing analysis, signal integrity, EM/IR, and physical verification.
• Begin synthesis and place-and-route implementation for CPU partitions and develop the new program RM flow.
• Build automation, constraints, quality metrics, signoff criteria, dashboards, checkers, and debug workflows to improve predictability, turnaround time, and PPA.
• Explore AI/ML-enabled physical design tooling for hotspot prediction, congestion forecasting, timing-risk classification, ECO prioritization, IR-drop screening, and flow tuning.
• Partner with architecture, RTL, circuit, DFT, CAD, program, data, and EDA vendor teams to enable advanced-node programs.
• Drive methodology adoption and technical standards across geographically distributed teams.

Requirements

• 10+ years of ASIC, SoC, or CPU physical design experience, preferably with high-performance CPUs or similarly complex digital designs.
• Deep expertise in RTL-to-GDS implementation and signoff, including timing closure, power optimization, signal integrity, EM/IR, extraction, and physical verification.
• Experience building or owning physical design methodology, automation, or CAD flows.
• Strong scripting skills in Tcl, Python, Perl, or similar languages.
• Technical leadership experience, including cross-team influence, mentoring, and driving standards across distributed organizations.
• Must be based in the United States and eligible to access applicable U.S. export-controlled technology.

Nice to have

• Experience applying AI/ML to physical design and evaluating AI-enabled EDA capabilities.
• Experience building production-ready data infrastructure for feature collection, validation, and signoff integration.
• Experience scaling CPU methodology across advanced-node programs, foundries, and multiple teams.

Culture & Benefits

• Remote work based in the United States.
• Competitive compensation package and benefits.
• Collaborative environment focused on curiosity and solving difficult technical problems.
• Equal opportunity employment.
• Opportunities to work with AI/ML, advanced semiconductor processes, and high-performance RISC-V CPUs.