Lead Design Engineer (SoC)

Location: Austin, United States

Company

hirify.global develops technology solutions and supports engineering work focused on digital design and electronic system development.

What you will do

• Design and integrate IPs in SoCs based on customer architectural specifications.
• Perform Lint and CDC checks, resolve design-quality issues, and establish related flows.
• Create synthesis constraints at the IP and SoC levels and perform basic synthesis for power, performance, and area optimization.
• Write detailed microarchitectural specification documents.
• Support verification planning, coverage analysis, feature debugging, and physical design implementation.
• Automate repetitive tasks and collaborate across engineering teams.

Requirements

• B.E., B.Tech, or M.Tech with at least 5 years of experience as a digital design engineer.
• Strong knowledge of digital design fundamentals and Verilog/SystemVerilog.
• Solid knowledge of Lint and CDC tools, including the ability to set up flows from scratch.
• Knowledge of synthesis constraints and Static Timing Analysis; familiarity with synthesis tools is beneficial.
• Familiarity with simulation tools such as Xcelium and Verisium, plus proficiency in Python, Perl, or Tcl.
• Good communication skills for effective cross-functional collaboration.

Nice to have

• Experience with AMBA protocols and other ARM IPs.
• Experience with high-speed IPs such as PCIe, Ethernet, or DDR.

Culture & Benefits

• Work focused on solving challenging technology problems.
• Opportunities to develop leadership and innovation skills.
• Cross-functional collaboration across design, verification, and physical design teams.