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Principal ASIC Design Engineer (ASIC)

12 150 - 16 200CAD
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
Canada
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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TL;DR

Principal ASIC Design Engineer (ASIC/SoC): Leading the development and deployment of design flows and methodologies bridging front-end design and back-end physical implementation with an accent on EDA methodologies, synthesis, and timing closure. Focus on establishing robust constraints, optimizing SoC front-end design flows, and ensuring seamless integration throughout the silicon development lifecycle.

Location: Ottawa, Canada

Salary: 145,800 - 194,400 CAD per annum

Company

hirify.global is a semiconductor solutions provider for data infrastructure across enterprise, cloud, AI, and carrier architectures.

What you will do

  • Lead the development of design flows that bridge front-end design and back-end physical implementation
  • Define and implement front-end methodologies for early-stage synthesis, static timing analysis, and clock/reset domain crossing (CDC/RDC)
  • Optimize flows to enable early detection of physical design and timing challenges
  • Collaborate cross-functionally with Architecture, RTL Design, Physical Design, Timing, and DFT teams
  • Drive the delivery of high-performance, timing-critical designs, including timing closure and power optimization

Requirements

  • Bachelor's degree in EE or CS (10-20 years exp) or Master's/PhD (8-20 years exp)
  • Strong foundation in ASIC design, verification, architecture, and front-end methodologies
  • Proficiency in Verilog/SystemVerilog, linting, synthesis, and formal equivalence checking
  • Hands-on experience with SoC architecture, including processor cores and memory subsystems
  • Proficiency in scripting and automation using Python or Perl
  • Must be eligible to access export-controlled information under U.S. export control laws (EAR)

Nice to have

  • Experience with high-speed protocol domains such as Ethernet, PCIe, and UALink
  • Familiarity with applying AI/ML techniques to ASIC development
  • Expertise in designing high-speed datapath logic and working with advanced ASIC technology nodes

Culture & Benefits

  • Competitive compensation and comprehensive benefits package
  • Environment of shared collaboration, transparency, and inclusivity
  • Access to tools and resources for professional growth and development

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