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4 дня назад

Yield Development Engineer (Semiconductor)

133 800 - 255 200$
Формат работы
hybrid
Тип работы
fulltime
Грейд
middle/senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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TL;DR

Yield Development Engineer (Semiconductor): Driving yield improvement strategies for cutting-edge semiconductor technologies with an accent on statistical analysis, defect mode identification, and process optimization. Focus on developing multivariate algorithms, conducting fault isolation, and collaborating with cross-functional teams to ensure high-volume manufacturing success.

Location: Must be based in the US (Hillsboro, Oregon) with a hybrid work model.

Salary: $133,800–$255,200 USD

Company

A global leader in semiconductor technology and innovation, dedicated to delivering world-changing technology that improves lives.

What you will do

  • Perform statistical analysis to construct process development roadmaps and drive yield milestones.
  • Analyze diverse data sources to identify defect modes and create predictive yield models.
  • Develop multivariate algorithms for high-volume data analysis to identify root cause yield limiters.
  • Extract insights from structured and unstructured data using machine learning and advanced statistical methods.
  • Collaborate with process integration, defect engineering, and electrical fault isolation teams to debug yield detractors.
  • Conduct fault isolation and failure analysis to determine the root cause of yield-impacting issues.

Requirements

  • Bachelor's degree in Engineering, Physical Sciences, Computer Science, or related field with 4+ years of experience, or Master's with 3+ years, or PhD.
  • 1+ years of experience in data analysis systems and machine learning techniques.
  • 1+ years of experience in optical probing or metrology.
  • Expertise in Statistical Process Control (SPC) and Design of Experiments (DOE) principles.
  • Must be eligible to work in the United States.

Nice to have

  • PhD with 2+ years of relevant experience.
  • Experience in fault isolation, failure analysis tools, and layout studies.
  • Expertise in semiconductor physics and advanced device interactions modeling.
  • Strong project management skills and ability to drive strategic objectives in matrixed organizations.

Culture & Benefits

  • Competitive total compensation package including base pay and stock bonuses.
  • Comprehensive health, retirement, and vacation benefit programs.
  • Hybrid work model allowing flexibility between on-site and off-site work.
  • Opportunity to work on industry-leading semiconductor innovation and transformation.

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