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Mixed Signal Design Verification Engineer

122 440 - 200 340$
Формат работы
hybrid
Тип работы
fulltime
Грейд
middle/senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

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TL;DR
Mixed Signal Design Verification Engineer (VHDL/Verilog/SystemVerilog): Developing verification plans, test benches, simulation models, and functional verification environments for mixed-signal logic components with an accent on analog behavioral modeling, coverage, power, and timing analysis. Focus on debugging presilicon issues, improving verification infrastructure, and collaborating with digital and analog architecture, RTL, and physical design teams.

Location: Hybrid role based at hirify.global sites in Hillsboro, Oregon, or Austin, Texas, United States, with on-site and off-site work

Annual salary: $122,440–$200,340 USD

Company

hirify.global designs and manufactures advanced silicon solutions and develops power delivery technologies for digital products.

What you will do

  • Perform functional verification of mixed-signal logic components, including analog behavioral models.
  • Develop IP verification plans, test benches, and verification environments for mixed-signal microarchitectures.
  • Run system simulation models to verify designs, analyze power and timing, and identify bugs.
  • Replicate, root-cause, and debug presilicon issues, then implement corrective measures.
  • Collaborate with digital and analog architects, RTL developers, and physical design teams to meet functional, performance, and power goals.
  • Document test plans, lead technical reviews, and improve functional verification infrastructure and methodology.

Requirements

  • Bachelor’s degree in Electrical Engineering, Computer Engineering, Computer Science, or a related field with 3+ years of experience, or a master’s degree with 2+ years of experience.
  • Professional experience with digital logic.
  • Experience with VHDL, Verilog, or SystemVerilog.
  • Experience developing testbench components, preferably with OVM or UVM.
  • Design debugging skills.

Nice to have

  • 7+ years of related experience.
  • Analog debugging skills.
  • Real-number current and voltage simulation modeling and debugging experience.

Culture & Benefits

  • Hybrid work model combining on-site and off-site work.
  • Competitive pay and stock bonuses.
  • Health, retirement, and vacation benefits.
  • Equal consideration for qualified applicants in accordance with applicable laws.

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