R&D Engineer (IC Design)

TL;DR

R&D Engineer IC Design: Verification of complex switch designs using SystemVerilog-based environments with an accent on testbenches, checkers, transactors, and testplans. Focus on verifying RTL and gatesim designs at block and chip levels, creating ATE testing vectors, and developing C-based diagnostic tests for silicon.

Location: USA - CA, San Jose (Innovation Drive), full-time onsite

Salary: $120,000 - $192,000

Company

Global technology leader that designs, develops and supplies semiconductor and infrastructure software solutions.

What you will do

• Create SystemVerilog-based verification environments including testbenches, checkers, and transactors.
• Develop and execute testplans for RTL and gatesim-based designs at block and chip levels.
• Generate ATE testing vectors.
• Build C-based diagnostic tests for actual silicon.

Requirements

• Master's Degree in Electrical and Electronic Engineering, Computer Science, or equivalent
• Minimum of 6 years of work experience in Design Verification
• Strong knowledge and hands-on experience in verification methods, tools, and environments
• Strong programming skills, including SystemVerilog and scripting languages
• Knowledge of networking and switching concepts is a plus

Nice to have

• Knowledge and experience in UVM methodology

Culture & Benefits

• Competitive base salary, discretionary annual bonus, and equity.
• Comprehensive benefits: medical, dental, vision plans, 401(K) with company matching, ESPP, EAP.
• Company paid holidays, paid sick leave, vacation time, and compliance with Paid Family Leave laws.