Signal Integrity Engineer (ASIC)

TL;DR

Signal Integrity Engineer (ASIC): Developing next-generation ASIC products and interconnect technologies with an accent on parallel interfaces, 2.5D/3D packaging, and signal/power integrity analysis. Focus on mask-based timing signoff, electromagnetic extraction, and automating analysis flows to support high-performance AI/ML and networking infrastructure.

Location: Must be based in San Jose, CA, USA

Salary: $143,800 – $230,000 USD

Company

A global technology leader developing complex IC solutions and advanced interconnect technologies for AI, cloud computing, and networking.

What you will do

• Perform mask-based timing signoff using time-domain simulations for parallel interfaces.
• Conduct electromagnetic extraction and modeling of signal and power delivery channels.
• Execute AC and transient analysis of Power Distribution Networks (PDN).
• Perform pre-layout modeling of transceivers and signal networks.
• Automate sign-off processes and collaborate with EDA suppliers to improve tool accuracy.
• Support pre-sales activities and generate technical reports for internal and customer teams.

Requirements

• Bachelor’s degree with 12+ years of experience or Master’s degree with 10+ years of related experience.
• Proficiency in at least one DDR/LPDDR or HBM SI/PI sign-off flow tool suite.
• Experience with IC, Package, and PCB database types.
• Strong scripting skills in Python and TCL for process automation.
• Ability to manage multiple concurrent customer projects under tight deadlines.
• Must be authorized to work in the USA.

Culture & Benefits

• Competitive base salary with discretionary annual bonus.
• New hire and annual equity award opportunities.
• Comprehensive medical, dental, and vision insurance plans.
• 401(k) participation with company matching.
• Employee Stock Purchase Program (ESPP) and Employee Assistance Program (EAP).
• Paid holidays, sick leave, and vacation time.