Package Failure Analysis Engineer
ΠΡΡΡ & Π‘ΠΎΠΏΡΠΎΠ²ΠΎΠ΄
ΠΠ»Ρ ΠΌΡΡΡΠ° Ρ ΡΡΠΎΠΉ Π²Π°ΠΊΠ°Π½ΡΠΈΠ΅ΠΉ Π½ΡΠΆΠ΅Π½ Plus
ΠΠΏΠΈΡΠ°Π½ΠΈΠ΅ Π²Π°ΠΊΠ°Π½ΡΠΈΠΈ
TL;DR
Package Failure Analysis Engineer (Semiconductor): Supporting root cause determination of assembled package yield loss and in-line failures with an accent on electrical fault isolation and defect characterization. Focus on conducting hands-on lab work, developing innovative failure analysis techniques, and collaborating across organizational boundaries to improve manufacturing yield.
Location: On-site in Phoenix, Arizona. US Citizenship is required due to the necessity of obtaining and maintaining a US Government TS/SCI Security Clearance with Polygraph.
Salary: $85,200β$139,810 USD
Company
Foundry is a global leader in semiconductor manufacturing, providing cutting-edge silicon process and packaging technology for the AI era.
What you will do
- Conduct hands-on lab work to perform fault isolation of electrical failures and defect characterization.
- Define data acquisition strategies and analysis plans to identify root causes of yield loss.
- Develop innovative failure analysis techniques and best-known methods (BKMs) to accelerate mechanism understanding.
- Collaborate with shift engineering technicians, module partners, and integration teams to meet program milestones.
- Provide technical consultation regarding packaging and assembly improvements.
- Respond to customer requests and events in a fast-paced manufacturing environment.
Requirements
- Bachelor's Degree or higher in Materials Science, Mechanical, Chemical, or Electrical Engineering, Physics, or Chemistry.
- US Citizenship is required.
- Ability to obtain and maintain a US Government TS/SCI Security Clearance with Polygraph.
- Hands-on experience with at least one electrical fault isolation or defect characterization technique.
- Ability to work a Shift 5 schedule (front half of the week, including Sundays).
- Strong analytical, problem-solving, and communication skills.
Nice to have
- Active US Government TS/SCI Security Clearance with Polygraph.
- Experience with optical analysis techniques (SEM, TEM, x-ray, optical microscopy).
- Knowledge of electrical circuits and probing equipment (TDR, EOTPR, EBAC, etc.).
- Familiarity with chemical compositional analysis (EDX, AFM, FTIR, XRD).
- Experience with CAD software and statistical tools like JMP.
Culture & Benefits
- Competitive total compensation package including stock bonuses.
- Comprehensive health, retirement, and vacation benefit programs.
- Collaborative and inclusive work environment focused on innovation.
- Opportunities to work with state-of-the-art semiconductor manufacturing technology.
ΠΡΠ΄ΡΡΠ΅ ΠΎΡΡΠΎΡΠΎΠΆΠ½Ρ: Π΅ΡΠ»ΠΈ ΡΠ°Π±ΠΎΡΠΎΠ΄Π°ΡΠ΅Π»Ρ ΠΏΡΠΎΡΠΈΡ Π²ΠΎΠΉΡΠΈ Π² ΠΈΡ ΡΠΈΡΡΠ΅ΠΌΡ, ΠΈΡΠΏΠΎΠ»ΡΠ·ΡΡ iCloud/Google, ΠΏΡΠΈΡΠ»Π°ΡΡ ΠΊΠΎΠ΄/ΠΏΠ°ΡΠΎΠ»Ρ, Π·Π°ΠΏΡΡΡΠΈΡΡ ΠΊΠΎΠ΄/ΠΠ, Π½Π΅ Π΄Π΅Π»Π°ΠΉΡΠ΅ ΡΡΠΎΠ³ΠΎ - ΡΡΠΎ ΠΌΠΎΡΠ΅Π½Π½ΠΈΠΊΠΈ. ΠΠ±ΡΠ·Π°ΡΠ΅Π»ΡΠ½ΠΎ ΠΆΠΌΠΈΡΠ΅ "ΠΠΎΠΆΠ°Π»ΠΎΠ²Π°ΡΡΡΡ" ΠΈΠ»ΠΈ ΠΏΠΈΡΠΈΡΠ΅ Π² ΠΏΠΎΠ΄Π΄Π΅ΡΠΆΠΊΡ. ΠΠΎΠ΄ΡΠΎΠ±Π½Π΅Π΅ Π² Π³Π°ΠΉΠ΄Π΅ β