Sr. Staff Engineer (Packaging Engineering)

TL;DR

Sr. Staff Engineer (Packaging Engineering): Driving semiconductor IC package development from concept to mass production with an accent on New Product Introduction (NPI) processes. Focus on defining optimal package solutions, managing OSAT/substrate suppliers, and ensuring manufacturability, performance, and reliability for cloud and AI architectures.

Location: Hsinchu City (Onsite)

Company

hirify.global is a global leader in semiconductor solutions, providing essential building blocks for data infrastructure across cloud, AI, enterprise, and carrier architectures.

What you will do

• Define optimal package solutions based on end-product and client requirements.
• Collaborate with cross-functional teams including BU, CE, QA, and Product Engineering to ensure manufacturability and performance.
• Perform comprehensive package design reviews and implement design guidelines.
• Manage OSAT and substrate suppliers regarding risk assessment, BOM, and process qualification.
• Resolve package-related quality and reliability issues in partnership with QA and suppliers.
• Contribute to the package technology roadmap and support new technology development.

Requirements

• Bachelor’s degree in Mechanical Engineering or Material Science with 5-7 years of experience, or Master’s/PhD with 3-5 years of experience in semiconductor packaging.
• Must be eligible to access export-controlled information under U.S. law.
• Proven experience in substrate, RDL, and assembly processes.
• Expertise in flip-chip package development and substrate review.
• Proficiency in Cadence APD and AutoCAD.
• Strong understanding of 1st-level assembly, packaging materials, and reliability standards.

Nice to have

• Knowledge of 2D, 2.5D, 3D, and wafer-level packaging.
• Prior experience in OSAT management.
• Strong program management capabilities.

Culture & Benefits

• Collaborative, transparent, and inclusive work environment.
• Access to tools and resources for professional growth and development.
• Opportunity to work on cutting-edge semiconductor technologies and infrastructure.

Hiring process

• Interviews are conducted in real-time to evaluate individual experience and communication skills.
• Use of AI tools during interviews is strictly prohibited and will result in disqualification.