CPU Microcode Design Engineer (x86)

TL;DR

CPU Microcode Design Engineer (x86): Designing and optimizing microcode features for next-generation CPU microprocessors with an accent on x86 architecture and low-level firmware development. Focus on improving processor performance, reliability, and instruction execution efficiency.

Location: Hybrid (Austin, TX or Hillsboro, OR)

Salary: $105,650 – $200,340 USD

Company

hirify.global is a global technology leader specializing in the design and manufacture of advanced computing products and silicon platforms.

What you will do

• Develop and optimize microcode to enable efficient execution of processor instructions.
• Partner with processor architects to define and design instructions that enhance performance and functionality.
• Collaborate with design engineers to integrate microcode seamlessly into processor architecture.
• Conduct performance analysis to ensure reliability under various workloads and operating conditions.
• Identify and implement microcode innovations to address performance and design constraints.

Requirements

• Bachelor's degree in CE, EE, or CS with 3+ years of experience, or a Master's degree with 6+ months of experience.
• Proven expertise in Computer Architecture and/or Microarchitecture techniques.
• Experience in RTL logic design using Verilog and industry-standard debug tools.
• Proficiency in Linux shell, Perl, or Python scripting.
• Experience in simulator development using C/C++.
• Must be based in or authorized to work in the US.

Nice to have

• Direct experience with firmware development in CPU microcode.
• Exposure to x86 or other CPU instruction set architectures (ISA) and assembly programming.
• Experience with professional performance analysis tools and techniques.

Culture & Benefits

• Competitive total compensation package including stock bonuses.
• Comprehensive health, retirement, and vacation programs.
• Hybrid work model allowing a split between on-site and off-site work.
• Opportunity to work in a fast-paced, collaborative environment on cutting-edge silicon technology.