FPGA Engineer (eInfochips)

Location: Fully onsite in San Jose, California or Austin, Texas from day one; travel to an Arrow client office may be required.

Company

eInfochips, an hirify.global company, provides product engineering and semiconductor design services for connected products and edge-to-cloud solutions.

What you will do

• Design and develop FPGA and RTL solutions using Verilog and SystemVerilog.
• Work with high-speed PCIe designs and industry-standard interfaces including AXI and APB.
• Apply ARM Fabric IPs, IP-XACT, computer architecture, clock-crossing techniques, and low-power design intent.
• Use EDA tools for simulation, connectivity analysis, CDC checking, linting, synthesis, low-power verification, and timing analysis.
• Write automation and engineering scripts using Python, Tcl, or Perl.
• Report progress to customers and support customer satisfaction.

Requirements

• 9+ years of relevant experience, including at least 5 years of Verilog design experience.
• Strong understanding of RTL design, digital concepts, and computer architecture.
• Experience with PCIe, AMBA AXI, ARM or C-based processors, and standard interface protocols.
• Experience with EDA tools such as Fusion Compiler, Design Compiler, Genus, VCS, SpyGlass Lint, Questa CDC, and VCLP.
• Proficiency with UPF, clock-domain crossing techniques, static timing analysis, and timing signoff fundamentals.
• Ability to work onsite in San Jose, CA or Austin, TX from day one and travel to client offices when requested.

Culture & Benefits

• Full-time position within Arrow's engineering services organization.
• Work with a global product engineering and semiconductor design business.
• Projects support connected products across multiple industries and technology verticals.