Назад
Company hidden
1 день назад

Senior Digital / Mixed-Signal IC Design or Verification Engineer (AI)

109 700 - 175 500$
Формат работы
onsite
Тип работы
fulltime
Грейд
senior
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
Для мэтча и отклика нужен Plus

Мэтч & Сопровод

Для мэтча с этой вакансией нужен Plus

Описание вакансии

Текст:
/
TL;DR
Senior Digital / Mixed-Signal IC Design or Verification Engineer (AI) (ASIC/semiconductor): Developing low-power, high-performance digital and mixed-signal ASICs for enterprise storage with an accent on RTL design, UVM-based verification, and cross-functional methodology leadership. Focus on closing functional and code coverage, integrating AI-assisted automation, and supporting complex products through characterization, qualification, and release to manufacturing.

Location: Onsite at the Mendota Heights, MN or Broomfield, CO design centers, USA

Annual base salary: USD 109,700–175,500, plus discretionary bonus and equity awards.

Company

hirify.global is a Fortune 500 semiconductor and technology company developing infrastructure products for data centers and enterprise storage.

What you will do

  • Act as a technical liaison between US design teams and global cross-functional engineering organizations.
  • Translate specifications into execution and support product development through testing, yield analysis, characterization, reliability analysis, qualification, and manufacturing release.
  • Define system requirements, digital control functions, block partitions, RTL logic, synthesis, formal verification, timing analysis, and place-and-route flows.
  • Develop and integrate digital cores, analog circuitry, custom cells, and transistor-level high-speed digital blocks.
  • Architect and maintain UVM-based testbenches for complex mixed-signal ASICs and lead block- and system-level verification through tape-out.
  • Drive verification quality, automation, and AI-assisted workflows for testbench generation, regression management, and debug efficiency.

Requirements

  • Bachelor's degree in Engineering with 8+ years of related experience, or Master's degree in Engineering with 6+ years of related experience.
  • Excellent spoken and written communication skills and experience coordinating technical problem-solving across global teams.
  • Advanced analytical skills with the ability to apply mathematics and physics to complex engineering problems.
  • For digital design: hands-on experience with ASIC EDA tools, Verilog/VHDL RTL coding, synthesis, simulation, static timing analysis, formal verification, and place and route.
  • For verification: expertise in coverage-driven verification, UVM/OVM, event-driven simulation, digital-analog interaction, SVA, and behavioral analog modeling.
  • Proficiency in Python, Perl, TCL, or similar scripting languages for verification automation, regressions, and simulation infrastructure.

Nice to have

  • Understanding of CMOS and Bipolar process technologies and device physics.
  • Experience across both IC design and verification domains.

Culture & Benefits

  • Work with global US and Asia design organizations and large-scale semiconductor engineering resources.
  • Medical, dental, and vision plans.
  • 401(k) participation with company matching and an Employee Stock Purchase Program.
  • Paid holidays, sick leave, vacation, and applicable family and other leave programs.
  • Discretionary annual bonus, new-hire equity grant, and annual equity awards.

Будьте осторожны: если работодатель просит войти в их систему, используя iCloud/Google, прислать код/пароль, запустить код/ПО, не делайте этого - это мошенники. Обязательно жмите "Пожаловаться" или пишите в поддержку. Подробнее в гайде →