Staff DFT Engineer (Semiconductor)

TL;DR

Staff DFT Engineer (Semiconductor): Designing and implementing advanced Design-for-Test architectures for complex semiconductor products with an accent on JTAG standards, ATPG, and memory repair. Focus on post-silicon validation, ATE pattern development, and automating test flows to ensure high-quality silicon production.

Location: Must be based in San Jose, CA, USA

Salary: $141,300 - $226,000

Company

hirify.global is a global technology leader that designs, develops, and supplies a broad range of semiconductor and infrastructure software solutions.

What you will do

• Develop and implement state-of-the-art DFT, test, and silicon engineering strategies.
• Design scan and BIST architectures, including memory repair solutions.
• Execute ATPG and utilize EDA tools like Tessent and PrimeTime.
• Perform logic equivalence checking and validate STA constraints.
• Conduct gate-level simulation and debug using industry-standard simulators.
• Perform post-silicon validation and debug using ATE patterns.

Requirements

• Bachelor's in Electrical or Computer Engineering with 8+ years of experience, or Master's with 6+ years of relevant industry experience.
• Hands-on experience with JTAG standards (1149.1, 1149.6, 1687) and boundary scan.
• Strong automation and scripting skills in Tcl, Perl, and shell.
• Proven ability to collaborate across teams with strong communication skills.
• Must be eligible to work in the USA.

Culture & Benefits

• Comprehensive medical, dental, and vision insurance plans.
• 401(k) participation with company matching.
• Employee Stock Purchase Program (ESPP).
• Paid holidays, sick leave, and vacation time.
• Discretionary annual bonus and equity awards.