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обновлено 4 дня назад

CPU HVM Functional-Test Verification Engineer

Формат работы
hybrid
Тип работы
fulltime
Грейд
middle
Английский
b2
Страна
Malaysia
Вакансия из списка Hirify.GlobalВакансия из Hirify Global, списка международных tech-компаний
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Описание вакансии

Текст:
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TL;DR
CPU HVM Functional-Test Verification Engineer (CPU DFT and Functional Testing): Validates DFT and develops functional test content for manufacturing next-generation CPU IP designs with an accent on fault coverage, test-gap analysis, and pre-silicon debugging. Focus on replicating and root-causing design or test failures, implementing corrective measures, and collaborating with CPU architecture, SOC design, and manufacturing teams.

Location: Penang, Malaysia; hybrid work with time split between the assigned hirify.global site and off-site work.

Company

hirify.global develops processors and other technologies across cloud, connectivity, memory, programmable solutions, and high-volume manufacturing.

What you will do

  • Validate design-for-test (DFT) implementations for manufacturing functional testing.
  • Develop functional tests to qualify manufacturing goals for next-generation CPU IP designs.
  • Use fault simulation to measure functional-test coverage and identify and close test gaps before high-volume manufacturing.
  • Replicate, root-cause, and debug test and design issues in pre-silicon environments.
  • Implement corrective measures to resolve failing tests.
  • Collaborate with CPU design and architecture, SoC design, DFT verification, and manufacturing teams.

Requirements

  • Bachelor’s or master’s degree in electrical engineering, computer engineering, or a related field, with 2+ years of experience; PhD holders are also considered.
  • Strong scripting and programming skills in Python, Perl, and C/C++.
  • Robust understanding of CPU architecture and microarchitecture fundamentals.
  • Proficiency in SystemVerilog and UVM, including debugging microarchitecture issues in pre-silicon environments.
  • Strong problem-solving, analytical, communication, and collaboration skills.
  • Ability to work in the hybrid model at the assigned hirify.global site in Penang, Malaysia.

Nice to have

  • Expertise in TAP (Test Access Port).
  • Experience with ASIC or FPGA design verification, particularly x86 CPU designs.
  • Background in post-silicon validation and debugging.
  • Experience using a fault simulator.

Culture & Benefits

  • Hybrid work model combining on-site and off-site work.
  • Shift 1 schedule in Malaysia.
  • Opportunity to work across CPU design, architecture, SoC design, DFT, and manufacturing functions.
  • Commitment to diversity, inclusion, education, sustainability, and Responsible Business Alliance compliance.
  • No recruitment, medical examination, or other hiring fees are charged to candidates.

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