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5 дней назад

Engineering Manager (Semiconductor)

140 830 - 231 670$
Формат работы
onsite
Тип работы
fulltime
Грейд
lead
Английский
b2
Страна
US
Вакансия из списка Hirify.GlobalВакансия из Hirify RU Global, списка компаний с восточно-европейскими корнями
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TL;DR

Engineering Manager (Semiconductor): Leading a team of process integration, yield, and defect reduction engineers to support high-volume manufacturing of advanced packaging technologies with an accent on defect reduction roadmaps and parametric monitoring. Focus on solving complex manufacturing challenges, implementing data-driven solutions, and ensuring delivery against foundry customer commitments.

Location: Must be based in Albuquerque, New Mexico (Onsite role)

Salary: $140,830–$231,670 USD

Company

A global leader in semiconductor manufacturing, technology development, and advanced packaging solutions.

What you will do

  • Lead and mentor a team of process integration, yield, and defect reduction engineers.
  • Develop and execute comprehensive defect reduction roadmaps to improve yield and product quality.
  • Design and implement defect scan strategies, quick-turn analyses, and parametric monitoring systems.
  • Collaborate with cross-functional teams including design, materials, product engineering, and HVM operations.
  • Build and maintain inline metrics dashboards for critical process modules and manufacturing parameters.
  • Drive continuous process improvement using Win It Inline methodologies.

Requirements

  • Master's or PhD in Electrical Engineering, Materials Science, Physics, Chemistry, or Chemical Engineering.
  • 5+ years of relevant semiconductor manufacturing or advanced packaging experience.
  • Proven track record in technology development and technology transfer.
  • Strong leadership skills with the ability to influence without formal authority.
  • Must be able to work onsite in Albuquerque, New Mexico.
  • Not eligible for immigration sponsorship.

Nice to have

  • 3+ years of yield analysis and defect reduction methodologies.
  • 3+ years of Failure Mode and Effects Analysis (FMEA) experience.
  • Deep understanding of integrated semiconductor process flows and process interactions.
  • Knowledge of defect metrology tools and capabilities.

Culture & Benefits

  • Competitive total compensation package including base pay and stock bonuses.
  • Comprehensive health and retirement benefit programs.
  • Paid vacation and time-off policies.
  • Opportunity to work on cutting-edge silicon and packaging technology for the AI era.

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