Design Engineer I (Embedded)

Location: Must be based in or able to work from Austin, Texas (Hybrid)

Salary: $78,750–$146,250 USD

Company

hirify.global is a leading innovator in low-power wireless connectivity, providing integrated SoCs and ecosystems for smart home, industrial IoT, and smart city applications.

What you will do

• Design, model, and verify digital blocks for low-power wireless products.
• Develop RTL implementations and verification environments to ensure high performance and quality.
• Collaborate with cross-functional teams to translate system requirements into efficient digital architectures.
• Debug and resolve design and verification issues throughout the development cycle.
• Contribute to the integration, bring-up, and validation of digital modules within SoC designs.
• Develop scripts and tools to improve design, verification, and testing efficiency.

Requirements

• Bachelor’s, Master’s, or PhD in Electrical Engineering, Computer Engineering, or related field.
• Experience with RTL design using Verilog or SystemVerilog.
• Understanding of digital design fundamentals including synchronous design, state machines, and timing.
• Experience with digital design simulation and verification methodologies.
• Basic programming skills in Python or MATLAB for automation and data analysis.

Nice to have

• Knowledge of Digital Signal Processing (DSP) concepts and wireless communication standards (Bluetooth, Zigbee, Thread, Wi-Fi).
• Experience with MATLAB modeling for DSP algorithms.
• Exposure to ASIC/SoC design flows (synthesis, linting, CDC analysis).
• Experience with FPGA development or hardware bring-up.

Culture & Benefits

• Comprehensive medical, dental, and vision plans with HSA options.
• 401k plan with company match and equity rewards (RSUs).
• Flexible PTO schedule and 3 paid volunteer days per year.
• Tuition reimbursement and adoption assistance.
• Onsite gym, free snacks, and downtown parking.