Senior Physical Design Engineer (Silicon)

TL;DR

Senior Physical Design Engineer (Silicon): Implementing custom IP and SoC designs from RTL to GDS to create manufacturing-ready design databases with an accent on physical design flow, synthesis, and timing closure. Focus on optimizing power, frequency, and area while improving physical design methodologies and flow automation.

Location: San Jose, Costa Rica (Hybrid). Must possess a Costa Rican unrestricted work permit.

Company

hirify.global's Central Engineering Group (CEG) is a data-driven organization focused on scalable engineering solutions, including Custom ASIC and Foundry Enablement.

What you will do

• Perform physical design implementation of custom IP and SoC designs from RTL to GDS.
• Manage all aspects of the physical design flow, including synthesis, place and route, CTS, floor planning, and STA.
• Run verification and signoff flows, including formal equivalence, layout verification, and electrical rule checking.
• Analyze results to recommend architectural improvements for current and future products.
• Optimize design parameters such as power, frequency, and area.
• Contribute to the development of physical design methodologies and flow automation.

Requirements

• Bachelor's or Master's degree in Electronic, Electrical, or Computer Engineering.
• 3+ years of experience in Synthesis, Place and Route physical design tools and sign-off.
• 3+ years of experience in Unix/Linux and shell programming.
• Advanced English level.
• Costa Rican unrestricted work permit.

Nice to have

• Experience writing software code in PERL, TCL, and PYTHON.
• Proven experience using AI tools in technical engineering contexts.

Culture & Benefits

• Hybrid work model allowing a split between on-site and off-site work.
• Opportunity to work with emerging technologies in AI, IoT, Edge, and Networking.
• Commitment to ethical hiring practices and an inclusive, diverse work environment.