Junior Layout Engineer (Analog)

TL;DR

Junior Layout Engineer (Analog): Delivering high-quality analog layout blocks and floorplans for microcontrollers and custom ICs with an accent on physical verification and reliability. Focus on executing DRC/LVS/DFM checks, implementing power supply strategies, and collaborating with global design teams to ensure zero-defect product delivery.

Location: Onsite in Catania, Italy

Company

hirify.global is a global leader in secure connectivity solutions for embedded applications, specializing in edge processing for industrial, IoT, and automotive markets.

What you will do

• Deliver IP-level floorplan activities and analog layout blocks.
• Participate in power supply strategy and signal distribution design.
• Execute physical verifications including DRC, LVS, DFM, and parasitic extractions.
• Contribute to design reviews and technical documentation.
• Support integration of layout blocks into final products.
• Provide technical training and develop layout guidelines.

Requirements

• 0-2 years of experience in analog layout for complex ICs.
• Degree in Electrical Engineering (BSEE/MSEE) or equivalent experience.
• Proficiency in layout design tools such as Cadence Virtuoso and Mentor Graphics Calibre.
• Knowledge of device physics and IC ESD protection strategies.
• Ability to collaborate effectively within cross-functional global teams.
• Strong focus on design for quality and long-term reliability.

Culture & Benefits

• Opportunity to work in a fast-paced consumer electronics environment.
• Collaboration with world-class engineering teams across multiple disciplines.
• Exposure to cutting-edge AI at the Edge and MCU development.
• Professional growth within a global semiconductor corporation.