DSP System Engineering Intern

TL;DR

DSP System Engineering Intern (Semiconductors): Contributing to the architecture and design of next-generation high-speed serial data transmission (SerDes) systems with an accent on DSP modeling, link budgeting, and system simulation. Focus on exploring optimization tradeoffs for performance and cost within a multidisciplinary team environment.

Location: Must be based in Pavia, Italy

Salary: €21,250–€28,750 (annual)

Company

hirify.global is a global leader in semiconductor solutions, providing the essential data infrastructure technology that connects the world across cloud, AI, and enterprise architectures.

What you will do

• Participate in the architecture team to design next-generation PHY solutions.
• Develop and utilize modeling approaches for system design and simulation.
• Perform link budgeting, non-ideality modeling, and system-level simulations.
• Analyze DSP challenges and generate performance vs. cost tradeoff curves.
• Collaborate with analog and digital design teams on multidisciplinary tasks.
• Engage in international team meetings and brainstorming sessions.

Requirements

• Currently enrolled in the final year of a Master’s degree in Electrical Engineering or Computer Science.
• Strong understanding of Digital Communication and Digital Signal Processing (DSP).
• Familiarity with communication system simulation.
• Proficiency in English (written and verbal).
• Must be eligible to access export-controlled information under U.S. law.
• Detail-oriented mindset with strong analytical and communication skills.

Nice to have

• Understanding of analog and digital circuit design.

Culture & Benefits

• Exposure to state-of-the-art PHY design in an international environment.
• Mentorship from experienced reference persons for fast-track learning.
• Collaborative, transparent, and inclusive work culture.
• Opportunity to contribute to transformative, long-term industry innovation.