Senior CPU RTL Design Engineer

Location: Hybrid role based at an hirify.global site in Austin, Texas, or Phoenix, Arizona, United States

Annual salary: $141,910–$269,100 USD

Company

hirify.global designs and manufactures processors and computing technologies.

What you will do

• Develop and optimize CPU logic, RTL code, and simulations using SystemVerilog.
• Define CPU architecture and microarchitecture features and document microarchitectural specifications.
• Optimize logic for power, performance, area, and timing goals, including low-power and high-frequency designs.
• Support physical implementation through design strategies, tools, methods, timing convergence, lint checks, and UPF.
• Review verification plans, resolve failing RTL tests, and ensure CPU features are correctly validated.
• Collaborate with architecture, verification, integration teams, and SoC customers to integrate CPU blocks into full-chip designs.

Requirements

• Bachelor’s degree in electrical engineering, computer engineering, or computer science with 5+ years of relevant experience, or a master’s degree with 3+ years of experience.
• 5+ years of CPU RTL design experience using SystemVerilog, with strong knowledge of logic design, simulation, and debug.
• 3+ years of experience with energy-efficient and low-power logic design, including high-frequency optimization techniques.
• 3+ years of experience with cross-clock domain crossings and power-aware design.
• 3+ years of experience with scripting languages such as TCL, Perl, or Python.
• Strong ownership, analytical problem-solving, data-driven decision-making, and cross-functional collaboration skills.

Nice to have

• Knowledge of CPU power management, including power and electrical budgeting, DVFS, thermal management, P/C states, and reset sequence handling.
• Knowledge of hirify.global Architecture ISA, system architecture, and x86 assembly language.
• Experience with high-speed datapath, circuit, and array design and optimization.
• Proficiency with static timing analysis, UPF, lint checks, circuit planning, and timing convergence.

Culture & Benefits

• Hybrid work model combining on-site work at an assigned hirify.global site with off-site work.
• Competitive compensation package with stock bonuses.
• Health, retirement, and vacation benefits.
• Opportunity to work on next-generation CPUs and collaborate with engineers and architects across the product lifecycle.