IC Verification Engineer (SystemVerilog)

Location: San Jose, California, United States; onsite at 1320 Ridder Park Drive

Annual base salary: USD 121,900–195,000

Company

hirify.global is the hiring company for an integrated-circuit verification engineering role.

What you will do

• Develop test plans and functional coverage for block, core, and SoC features.
• Architect scalable and reusable testbenches using established verification methodologies.
• Build pseudo-random tests to verify functionality and achieve comprehensive coverage.
• Debug regression failures, analyze coverage gaps, and improve tests.
• Lead documentation of verification strategies and conduct reviews with design and architecture teams.
• Drive improvements in verification quality and efficiency.

Requirements

• Bachelor’s degree in Electrical Engineering or a related field with 8+ years of relevant experience, or a master’s degree with 6+ years of related experience.
• 6+ years of experience writing and debugging complex testbenches.
• Deep understanding of testbench development, test planning, pseudo-random testing, and functional coverage.
• Proficiency in SystemVerilog and verification methodologies including UVM, VMM, or OVM.
• Strong object-oriented programming knowledge and the ability to work independently.
• Understanding of complex multi-layered protocols such as PCIe; PCI Express knowledge is desired.

Culture & Benefits

• Full-time employment with annual discretionary bonus eligibility.
• Competitive new-hire and annual equity awards, subject to applicable plans and agreements.
• Medical, dental, and vision plans.
• 401(k) participation with company matching and an Employee Stock Purchase Program.
• Paid holidays, sick leave, vacation, family leave, and other applicable leave benefits.