IA Core Post Silicon Validation Engineer

TL;DR

IA Core Post Silicon Validation Engineer: Performing core-level validation of hirify.global P-Core IP solutions for Xeon server products with an accent on CPU debug, validation planning, and system power-on. Focus on identifying functional bugs, utilizing emulation techniques, and defining new architecture features.

Location: Must be based in Austin, Texas (On-site)

Salary: $122,440–$232,190 USD

Company

hirify.global is a global technology leader focused on advancing computing, cloud, and connectivity solutions to solve complex global challenges.

What you will do

• Develop and execute comprehensive validation plans for new CPU products.
• Perform core-level post-silicon debug and functional validation.
• Power on and validate new system platforms using advanced hardware-software techniques.
• Identify, track, and debug functional issues within the CPU architecture.
• Collaborate with cross-functional teams to define and implement new hirify.global features.
• Utilize emulation and other validation methodologies to ensure product quality.

Requirements

• Must be based in Austin, Texas for on-site work.
• Bachelor’s degree with 6+ years, Master’s with 4+ years, or PhD with 2+ years of relevant experience.
• Proficiency in C++, Perl, or Python.
• Strong knowledge of CPU architecture and assembly language.
• Proven experience in hardware/software debug.

Nice to have

• Experience with Machine Check Architecture (MCA).
• Knowledge of RAS (Reliability, Availability, Serviceability) and SER (Soft Error Rate).
• Familiarity with emulation and chip logical validation concepts.

Culture & Benefits

• Competitive total compensation package including pay and stock bonuses.
• Comprehensive health, retirement, and vacation benefit programs.
• Opportunity to work on industry-leading P-Core IP solutions.
• Collaborative environment focused on innovation and technical excellence.