Design Technology Tool Enablement Engineer (Semiconductor)

Location: Hybrid work model with onsite time at Intel sites in Hillsboro, Oregon; Phoenix, Arizona; or Santa Clara, California, United States

Annual salary: $173,660–$284,580 USD

Company

hirify.global is presented in the posting alongside Intel Foundry's semiconductor manufacturing and technology enablement organization.

What you will do

• Design, develop, test, and debug software tools and methodologies for semiconductor process design and manufacturing.
• Collaborate with process developers, design rule owners, end users, and EDA vendors to define technology requirements and tool specifications.
• Automate workflows to improve efficiency, accuracy, and deployment across design teams.
• Build and execute test cases to validate software tools and their integration with design methodologies.
• Assess performance contributors, isolate problems, and translate physical design challenges into algorithmic and software-driven solutions.
• Analyze complex problems and drive solutions across cross-functional and cross-site teams.

Requirements

• Master's degree in Electrical Engineering, Computer Engineering, or a related STEM field with 8+ years of experience, or a Ph.D. in a related field with 5+ years of experience.
• 3+ years of experience with Python, Tcl, or Perl scripting for automation or testing on Unix/Linux platforms.
• 3+ years of experience with EDA tools such as Calibre, ICV, or Pegasus, including rule-deck development using SVRF/TVF, PXL, or PVL.
• 5+ years of experience in semiconductor device physics or process technology, design rules, and physical design problem-solving.
• Strong analytical, organizational, communication, leadership, and cross-functional collaboration skills.

Nice to have

• Familiarity with DRC, LVS, and density/fill physical verification modules.
• Experience with Cadence Virtuoso or Synopsys Custom Designer.
• Experience leading process improvements or innovation initiatives.

Culture & Benefits

• Hybrid work model combining onsite and off-site work.
• Competitive compensation with stock bonuses.
• Health, retirement, and vacation benefits.
• Work within a worldwide semiconductor manufacturing and technology network.