Design Technology Tool Enablement Engineer (EDA)

TL;DR

Design Technology Tool Enablement Engineer (EDA): Designing and developing software tools and flows for semiconductor process design and manufacturing with an accent on automation, rule deck development, and manufacturability. Focus on optimizing EDA tool performance, implementing complex design rules into software solutions, and collaborating with process developers to enable advanced semiconductor technologies.

Location: Hybrid (Must be based in Hillsboro, Santa Clara, or Phoenix, US)

Salary: $173,660 - $284,580 USD

Company

hirify.global is a global leader in semiconductor manufacturing, focusing on cutting-edge silicon process and packaging technology for the AI era.

What you will do

• Design, develop, and debug software tools and methodologies for semiconductor process design and manufacturing.
• Collaborate with process developers and design rule owners to implement optimal technology specifications.
• Automate workflows to enhance efficiency, accuracy, and deployment across various teams.
• Build and execute test cases to validate software tools and ensure seamless integration with design methodologies.
• Coordinate tool feature requirements and specifications with internal partners and external EDA vendors.
• Assess and isolate performance contributors for technology features as part of the enablement process.

Requirements

• Master's degree in Electrical/Computer Engineering or STEM with 8+ years experience, or a Ph.D. with 5+ years.
• 3+ years of experience in scripting languages (Python, Tcl, Perl) for automation on Unix/Linux platforms.
• 3+ years of experience with EDA tools (Calibre, ICV, or Pegasus) and developing rule decks (SVRF/TVF, PXL, PVL).
• 5+ years of experience in semiconductor device physics, process technology, and design rules.
• Must be based in or be able to work from Hillsboro, Santa Clara, or Phoenix (Hybrid model).

Nice to have

• Familiarity with physical verification techniques, including DRC, LVS, and density/fill modules.
• Exposure to layout and schematic entry tools such as Cadence Virtuoso or Synopsys Custom Designer.
• Demonstrated leadership in driving process improvements or innovation initiatives.

Culture & Benefits

• Comprehensive total compensation package including competitive pay and stock bonuses.
• Full benefit programs covering health, retirement, and vacation.
• Hybrid work model allowing a split between on-site and off-site work.
• Opportunity to work on industry-leading process technologies and groundbreaking semiconductor products.