Photolithography Process Engineer (Semiconductors)

TL;DR

Photolithography Process Engineer (Semiconductors): Managing and optimizing photolithography processes in a high-volume semiconductor wafer manufacturing environment with an accent on cost reduction and process stability. Focus on implementing SPC using Six-Sigma methodology, optimizing tool utilization, and leading cross-functional lean activity teams.

Location: Onsite in Chandler, USA

Company

A global leader in secure connectivity solutions, ensuring manufacturing excellence and delivery of high-quality semiconductor devices.

What you will do

• Reduce overall costs of non-conformal issues, including wafer scrap and photo rework.
• Implement process SPC and optimize development utilizing Six-Sigma statistical methodology.
• Improve tool utilization and availability in a high-volume wafer FAB.
• Develop and write standard work procedure documents for Out of Control Action Plans.
• Collaborate with equipment and device teams to identify and reduce process variation.
• Train process technicians and FAB associates on tool operation and wafer dispositioning.

Requirements

• BS or MS degree in engineering or a relevant field of studies.
• 5+ years of process engineering experience in a similar high-volume semiconductor manufacturing environment.
• Expertise in Six-Sigma statistical methodology.
• Must be able to work onsite in Chandler, USA.

Nice to have

• Experience with ASML Scanner or Canon Stepper.
• Experience with TEL ACT 8 or Mark 7 track.
• Experience with KLA 8100 CDSEM or Archers.