Senior Out-of-Order CPU Architect

TL;DR

Senior Out-of-Order CPU Architect (CPU Architecture/ISA): Develop and drive end-to-end CPU architecture specifications for high-performance computing and low-power products with an accent on performance, power, frequency, area, and feature content. Focus on inventing and specifying architectural and microarchitectural features (including ISA extensions), building test plans and simulation infrastructure, and debugging complex microarchitecture issues to converge timing and power constraints.

Company

hirify.global designs and delivers silicon and platform technologies for computing across data centers and consumer devices.

What you will do

• Drive end-to-end CPU architecture specifications from hardware features, requirements, and lifecycle needs.
• Define CPU targets for performance, power, frequency, area, and feature content aligned to market requirements.
• Explore and propose novel out-of-order CPU architectures across segments from high-performance computing to extreme low-power.
• Invent, conceptualize, and specify architectural/microarchitectural features and define/document new ISA instructions.
• Develop and execute test plans and infrastructure, simulate functional models, and analyze results using advanced statistical techniques.
• Collaborate across architects, design, verification, and validation teams; implement microarchitectural specifications in SystemVerilog when needed to resolve timing/power convergence issues.

Requirements

• Location: Must be based in the US (Texas, Austin)
• 15+ consecutive years of experience in high-performance/high-frequency ARM or x86 CPU organizations in design and/or architectural domains.
• 10+ years of experience in out-of-order CPU pipeline sections (rename/allocation, uop/instruction schedulers, execution units).
• 5+ years writing RTL and owning timing and power convergence across multiple CPU generations.
• 2+ years building deep, high-frequency advanced integer and/or floating-point/vector schedulers.
• Proven ability to debug microarchitecture and simulation issues and solve complex design problems.

Culture & Benefits

• Hybrid work model: split time between on-site at the assigned hirify.global site and off-site work.
• Total compensation package includes competitive pay, stock bonuses, and benefits (health, retirement, vacation).
• Annual salary range for US-located roles: $190,610.00–$361,480.00 USD.
• Extended Background Investigation required for this Position of Trust.

Hiring process

• Application review and consideration for employment.
• Background investigation steps as required for the Position of Trust.